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ISL25700 Scheda tecnica(PDF) 10 Page - Intersil Corporation |
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ISL25700 Scheda tecnica(HTML) 10 Page - Intersil Corporation |
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10 / 18 page  ISL25700 10 FN6885.0 September 3, 2010 Principles of Operation The ISL25700 allows for precisely controlling the temperature of an external object and/or power dissipation of the external P-MOSFET. The temperature control is done by continuously sensing resistance of the NTC thermistor, and adjusting the current flow through the P-MOSFET (temperature controlling element). ISL25700 drives the P-MOSFET proportionally inverted to the difference between the object temperature and target temperature set point (TSET), set by the user through the I2C serial interface. Temperature is sensed by the external NTC thermistor and converted to a driving voltage by the Wheatstone bridge and its amplifier. One leg of the current-mode Wheatstone bridge contains an external NTC thermistor with the programmable 8-bit FTC DAC and another leg contains the selectable current source K1 that feeds an internal resistor RINT. The 8-bit FTC DAC allows fine-tuning the TSET with resolution better than +0.1°C within a +15°C coarse temperature range window. The TSET temperature is set through the Temperature Coarse Range Control Register, Reg.01h[2:0], and the Fine Temperature Control Register, Reg.02h[7:0]; refer to “ISL25700 MEMORY MAP” on page 11. A +15°C temperature coarse range window can be centered on TSET point based on the thermistor’s parameters, such as resistance, R/T curve type, tolerance and NTC slope and by adjusting a current ratio flowing through the legs of the Wheatstone bridge. Note that the TSET target temperature should be higher than the anticipated maximum ambient temperature for the application. There are total of 32 system gain settings available in the Gain Control Register, Reg.03h[4:0], with 0.35dB resolution per step. The gain control allows to prevent the thermal system from oscillation by adjusting the total system gain remotely, without use of external components. The internal current sensing circuitry provides the ability to control and adjust the power dissipated in the P-MOSFET through the Current Sense Register, Reg.01h[7:3]. This function allows for adjusting the initial turn on heating curve and protects from over-heating of the P-MOSFET. An external current sensing resistor RSENSE, serial with the P-MOSFET, is required. A current limit can be selected for the chosen RSENSE. It should have an effective voltage drop from 200mV to 1750mV and be inside the safe operating area of the MOSFET. A General Purpose 8-bit DAC, GP DAC provides a programmable voltage output VDAC through the General Purpose DAC Register, Reg.04h[7:0]. The output swing of General Purpose DAC can be set through the Gain Control bit in Reg.03h[6] or totally disabled by resetting the DAC Enable Bit in Reg.03h[7]. Memory Map The are two types of memory banks in the chip; volatile (RAM) and non-volatile (EEPROM). Volatile registers from address 00h to 07h are identical to non-volatile registers in terms of the register’s name and bit definitions. All the data is recalled from non-volatile registers and maintained in the volatile registers at power-up. It is possible to do independent write/read to the volatile and non-volatile banks after power-up by setting NV bit in the Control/Status Register, Reg.08h[7]. Note that the data written to the non-volatile registers will be automatically written to corresponding volatile registers, however no direct reading from non-volatile registers is possible. All the readings are from corresponding volatile registers. The Memory Map of the chip is in Table 1. FIGURE 12. GP DAC GAIN ERROR Typical Performance Curves (Continued) -0.5 -0.3 -0.1 0.1 0.3 0.5 5 55 105 155 205 255 CODE (DECIMAL) VDD = 5V VDD = 15V |
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