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FW114 Scheda tecnica(PDF) 3 Page - Sanyo Semicon Device |
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FW114 Scheda tecnica(HTML) 3 Page - Sanyo Semicon Device |
3 / 3 page FW114 PS No.5848-3/3 No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury, death or property loss. Anyone purchasing any products described or contained herein for an above-mentioned use shall: Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated with such use: Not impose any responsibilty for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guarant- eed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of May, 1998. Specifications and information herein are subject to change without notice. Ciss,Coss,Crss - VDS VGS - Qg f=1MHz Ciss Crss Coss VDS=–10V ID=–3A 10 2 3 5 7 100 2 3 5 7 1000 2 3 5 7 10000 0-4 -2 -6 -8 -10 -14 -12 -16 -18 -20 0 -1 -2 -3 -4 -5 -10 -9 -8 -7 -6 0 2 4 6 8 10 12 14 24 16 18 20 22 Drain-to-Source Voltage,VDS –V Total Gate Charge, Qg – nC Total Dissipation 1 unit Mountes in ceramic board(1200mm2 ×0.8mm) ,,,,,,,,,,, ,,,,,,,,,,, ,,,,,,,,,,, ,,,,,,,,,,, ,,,,,,,,,,, ,,,,,,,,,,, ,,,,,,,,,,, ,,,,,,,,,,, Mounted on ceramic board (1200mm2 ×0.8mm) M ounted on ceram ic board (1200mm ×0. 8mm) 2 Drain Current, ID –A Allowable Dissipation, PD(FET 1) – W Ambient Temperature, Ta – ˚C Drain -to-Source Voltage, VDS -V VDD=–10V VGS=–4V t r t f td(off) t d(on) 1m 10ms 100 µs 100ms 10 µs IDP=–32A I D=–3A Operation in this area is limited by RDS(on). Ta=25˚C 1pulse 1unit 0 0.2 0.2 0.4 0.6 0.8 1.0 2.0 1.6 1.8 1.4 1.2 0 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 SW Time - I D P D(FET2) - P D(FET1) P D - Ta A S O 020 0.5 1.0 2.5 2.0 1.7 1.5 0 40 60 80 100 120 140 160 2 3 5 7 -0.1 1.0 10 2 3 5 7 100 2 3 5 7 1000 23 5 7 7 -1.0 23 5 7 -10 2 2 3 3 5 5 7 7 -0.01 -0.1 -0.01 -0.1 23 5 7 2 3 5 2 3 7 -1.0 -10 2 3 5 7 -1.0 2 3 5 7 2 3 5 7 -10 -100 DC operation |
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