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SI1014-A-GM Scheda tecnica(PDF) 5 Page - Silicon Laboratories

Il numero della parte SI1014-A-GM
Spiegazioni elettronici  Ultra Low Power, 16/8 kB, 12/10-Bit ADC MCU with Integrated 240-960 MHz EZRadioPRO Transceiver
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Produttore elettronici  SILABS [Silicon Laboratories]
Homepage  http://www.silabs.com
Logo SILABS - Silicon Laboratories

SI1014-A-GM Scheda tecnica(HTML) 5 Page - Silicon Laboratories

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Rev. 1.0
5
Si1010/1/2/3/4/5
18.9. Software Reset .............................................................................................. 192
19. Clocking Sources................................................................................................. 194
19.1. Programmable Precision Internal Oscillator .................................................. 195
19.2. Low Power Internal Oscillator........................................................................ 195
19.3. External Oscillator Drive Circuit..................................................................... 195
19.3.1. External Crystal Mode........................................................................... 195
19.3.2. External RC Mode................................................................................. 197
19.3.3. External Capacitor Mode....................................................................... 198
19.3.4. External CMOS Clock Mode ................................................................. 198
19.4. Special Function Registers for Selecting and Configuring the System Clock 199
20. SmaRTClock (Real Time Clock).......................................................................... 203
20.1. SmaRTClock Interface .................................................................................. 203
20.1.1. SmaRTClock Lock and Key Functions.................................................. 204
20.1.2. Using RTC0ADR and RTC0DAT to Access SmaRTClock
Internal Registers .................................................................................. 204
20.1.3. RTC0ADR Short Strobe Feature........................................................... 205
20.1.4. SmaRTClock Interface Autoread Feature ............................................. 205
20.1.5. RTC0ADR Autoincrement Feature........................................................ 206
20.2. SmaRTClock Clocking Sources .................................................................... 209
20.2.1. Using the SmaRTClock Oscillator with a Crystal or
External CMOS Clock ........................................................................... 209
20.2.2. Using the SmaRTClock Oscillator in Self-Oscillate Mode..................... 210
20.2.3. Using the Low Frequency Oscillator (LFO) ........................................... 210
20.2.4. Programmable Load Capacitance......................................................... 210
20.2.5. Automatic Gain Control (Crystal Mode Only) and
SmaRTClock Bias Doubling.................................................................. 211
20.2.6. Missing SmaRTClock Detector ............................................................. 212
20.2.7. SmaRTClock Oscillator Crystal Valid Detector ..................................... 213
20.3. SmaRTClock Timer and Alarm Function ....................................................... 213
20.3.1. Setting and Reading the SmaRTClock Timer Value ............................. 213
20.3.2. Setting a SmaRTClock Alarm ............................................................... 213
20.3.3. Software Considerations for using the SmaRTClock Timer and Alarm 214
21. Port Input/Output ................................................................................................. 219
21.1. Port I/O Modes of Operation.......................................................................... 220
21.1.1. Port Pins Configured for Analog I/O...................................................... 220
21.1.2. Port Pins Configured For Digital I/O...................................................... 220
21.1.3. Interfacing Port I/O to 5 V and 3.3 V Logic............................................ 221
21.1.4. Increasing Port I/O Drive Strength ........................................................ 221
21.2. Assigning Port I/O Pins to Analog and Digital Functions............................... 221
21.2.1. Assigning Port I/O Pins to Analog Functions ........................................ 221
21.2.2. Assigning Port I/O Pins to Digital Functions.......................................... 222
21.2.3. Assigning Port I/O Pins to External Digital Event Capture Functions ... 222
21.3. Priority Crossbar Decoder ............................................................................. 223
21.4. Port Match ..................................................................................................... 228
21.5. Special Function Registers for Accessing and Configuring Port I/O ............. 231


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