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LM22677TJE-5.0 Scheda tecnica(PDF) 9 Page - National Semiconductor (TI) |
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LM22677TJE-5.0 Scheda tecnica(HTML) 9 Page - National Semiconductor (TI) |
9 / 16 page 1 k Ω resistor to ground. The diagram in Figure 3 illustrates this setup. The two regulators will be clocked at the same fre- quency but slightly phase shifted according to the minimum off-time of the regulator with the fastest running oscillator. The slight phase shift helps to reduce the stress on the input ca- pacitors of the power supply. 30074130 FIGURE 4. Self Synchronizing Setup Boot Pin The LM22677 integrates an N-Channel FET switch and as- sociated floating high voltage level shift / gate driver. This gate driver circuit works in conjunction with an internal diode and an external bootstrap capacitor. A 0.01 µF ceramic capacitor connected with short traces between the BOOT pin and the SW pin is recommended to effectively drive the internal FET switch. During the off-time of the switch, the SW voltage is approximately -0.5V and the external bootstrap capacitor is charged from the internal supply through the internal boot- strap diode. When operating with a high PWM duty-cycle, the buck switch will be forced off each cycle to ensure that the bootstrap capacitor is recharged. See the maximum duty-cy- cle section for more details. Thermal Protection Internal Thermal Shutdown circuitry protects the LM22677 in the event the maximum junction temperature is exceeded. When activated, typically at 150°C, the regulator is forced into a low power reset state. There is a typical hysteresis of 15 degrees. Internal Compensation The LM22677 has internal compensation designed for a sta- ble loop with a wide range of external power stage compo- nents. Insuring stability of a design with a specific power stage (in- ductor and output capacitor) can be tricky. The LM22677 stability can be verified over varying loads and input and out- put voltages using WEBENCH® Designer online circuit sim- ulation tool at www.national.com. A quick start spreadsheet can also be downloaded from the online product folder. The internal compensation of the -ADJ option of the LM22677 is optimized for output voltages below 5V. If an output voltage of 5V or higher is needed, the -5.0 option with an additional external resistor divider may also be used. The typical location of the internal compensation poles and zeros as well as the DC gain is given in Table 1. The LM22677 has internal type III compensation allowing for the use of most output capacitors including ceramics. This information can be used to calculate the transfer function from the FB pin to the internal compensation node (input to the PWM comparator in the block diagram). TABLE 1. Corners Frequency Pole 1 150 kHz Pole 2 250 kHz Pole 3 100 Hz Zero 1 1.5 kHz Zero 2 15 kHz DC gain 37.5 dB For the power stage transfer function the standard voltage mode formulas for the double pole and the ESR zero apply: The peak ramp level of the oscillator signal feeding into the PWM comparator is V IN/10 which equals a gain of 20dB of this modulator stage of the IC. The -5.0 fixed output voltage option has twice the gain of the compensation transfer func- tion compared to the -ADJ option which is 43.5dB instead of 37.5dB. Generally, calculation as well as simulation can only aid in selecting good power stage components. A good design prac- tice is to test for stability with load transient tests or loop measurement tests. Application note AN-1889 shows how to easily perform a loop transfer function measurement with only an oscilloscope and a function generator. Application Information EXTERNAL COMPONENTS The following design procedures can be used to design a non- synchronous buck converter with the LM22677. Inductor The inductor value is determined based on the load current, ripple current, and the minimum and maximum input voltage. To keep the application in continuous current conduction mode (CCM), the maximum ripple current, I RIPPLE , should be less than twice the minimum load current. The general rule of keeping the inductor current peak-to-peak ripple around 30% of the nominal output current is a good compromise between excessive output voltage ripple and ex- cessive component size and cost. Using this value of ripple current, the value of inductor, L, is calculated using the fol- lowing formula: where F is the switching frequency which is 500 kHz without an external frequency set resistor or external sync signal ap- plied to the RT/SYNC pin. If the switching frequency is set 9 www.national.com |
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