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LMZ14201 Scheda tecnica(PDF) 5 Page - National Semiconductor (TI) |
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LMZ14201 Scheda tecnica(HTML) 5 Page - National Semiconductor (TI) |
5 / 18 page Symbol Parameter Conditions Min (Note 3) Typ (Note 4) Max (Note 3) Units ΔV O/IOUT Load Regulation V IN = 24V 1.5 mV/A η Efficiency V IN = 24V VO = 3.3V IO = 1A 92 % Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device is intended to be functional. For guaranteed specifications and test conditions, see the Electrical Characteristics. Note 2: The human body model is a 100pF capacitor discharged through a 1.5 k Ω resistor into each pin. Test method is per JESD-22-114. Note 3: Min and Max limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlation using Statistical Quality Control (SQC) methods. Limits are used to calculate National’s Average Outgoing Quality Level (AOQL). Note 4: Typical numbers are at 25°C and represent the most likely parametric norm. Note 5: EN 55022:2006, +A1:2007, FCC Part 15 Subpart B: 2007. See AN-2024 and layout for information on device under test. Note 6: Theta JA measured on a 1.705” x 3.0” four layer board, with one ounce copper, thirty five 12 mil thermal vias, no air flow, and 1W power dissipation. Refer to PCB layout diagrams Typical Performance Characteristics Unless otherwise specified, the following conditions apply: V IN = 24V; Cin = 10uF X7R Ceramic; CO = 100uF X7R Ceramic; Tam- bient = 25 C for efficiency curves and waveforms. Efficiency 6V Input @ 25°C 30114631 Dissipation 6V Input @ 25°C 30114632 Efficiency 12V Input @ 25°C 30114603 Dissipation 12V Input @ 25°C 30114604 5 www.national.com |
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