Motore di ricerca datesheet componenti elettronici
  Italian  ▼
ALLDATASHEETIT.COM

X  

MC100EP195BMNR4G Scheda tecnica(PDF) 1 Page - ON Semiconductor

Il numero della parte MC100EP195BMNR4G
Spiegazioni elettronici  3.3V ECL Programmable Delay Chip
Download  17 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Produttore elettronici  ONSEMI [ON Semiconductor]
Homepage  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

MC100EP195BMNR4G Scheda tecnica(HTML) 1 Page - ON Semiconductor

  MC100EP195BMNR4G Datasheet HTML 1Page - ON Semiconductor MC100EP195BMNR4G Datasheet HTML 2Page - ON Semiconductor MC100EP195BMNR4G Datasheet HTML 3Page - ON Semiconductor MC100EP195BMNR4G Datasheet HTML 4Page - ON Semiconductor MC100EP195BMNR4G Datasheet HTML 5Page - ON Semiconductor MC100EP195BMNR4G Datasheet HTML 6Page - ON Semiconductor MC100EP195BMNR4G Datasheet HTML 7Page - ON Semiconductor MC100EP195BMNR4G Datasheet HTML 8Page - ON Semiconductor MC100EP195BMNR4G Datasheet HTML 9Page - ON Semiconductor Next Button
Zoom Inzoom in Zoom Outzoom out
 1 / 17 page
background image
© Semiconductor Components Industries, LLC, 2008
September, 2008 − Rev. 1
1
Publication Order Number:
MC100EP195B/D
MC100EP195B
3.3V ECL Programmable
Delay Chip
Descriptions
The MC100EP195B is a Programmable Delay Chip (PDC)
designed primarily for clock deskewing and timing adjustment. It
provides variable delay of a differential NECL/PECL input transition.
The delay section consists of a programmable matrix of gates and
multiplexers as shown in the logic diagram, Figure 2. The delay
increment of the EP195B has a digitally selectable resolution of about
10 ps and a net range of up to 10.2 ns. The required delay is selected by
the 10 data select inputs D[9:0] values and controlled by the LEN
(pin 10). A LOW level on LEN allows a transparent LOAD mode of
real time delay values by D[9:0]. A LOW to HIGH transition on LEN
will LOCK and HOLD current values present against any subsequent
changes in D[10:0]. The approximate delay values for varying tap
numbers correlating to D0 (LSB) through D9 (MSB) are shown in
Table 6 and Figure 3.
The IN/IN inputs can accept LVPECL (SE of Diff), or LVDS level
signals. Because the EP195B is designed using a chain of multiplexers
it has a fixed minimum delay of 2.2 ns. An additional pin D10 is
provided for controlling Pins 14 and 15, CASCADE and CASCADE,
also latched by LEN, in cascading multiple PDCs for increased
programmable range. The cascade logic allows full control of multiple
PDCs. Switching devices from all “1” states on D[0:9] with SETMAX
LOW to all “0” states on D[0:9] with SETMAX HIGH will increase
the delay equivalent to “D0”, the minimum increment.
Select input pins D[10:0] may be threshold controlled by
combinations of interconnects between VEF (pin 7) and VCF (pin 8)
for LVCMOS, ECL, or LVTTL level signals. For LVCMOS input
levels, leave VCF and VEF open. For ECL operation, short VCF and
VEF (Pins 7 and 8). For LVTTL level operation, connect a 1.5 V
supply reference to VCF and leave open VEF pin. The 1.5 V reference
voltage to VCF pin can be accomplished by placing a 2.2 kW resistor
between VCF and VEE for a 3.3 V power supply.
The VBB pin, an internally generated voltage supply, is available to
this device only. For single−ended input conditions, the unused
differential input is connected to VBB as a switching reference voltage.
VBB may also rebias AC coupled inputs. When used, decouple VBB
and VCC via a 0.01 mF capacitor and limit current sourcing or sinking
to 0.5 mA. When not used, VBB should be left open.
The 100 Series contains temperature compensation.
Features
Maximum Input Clock Frequency >1.2 GHz Typical
Programmable Range: 0 ns to 10 ns
Delay Range: 2.2 ns to 12.2 ns
10 ps Increments
PECL Mode Operating Range:
VCC = 3.0 V to 3.6 V with VEE = 0 V
NECL Mode Operating Range:
VCC = 0 V with VEE = −3.0 V to −3.6 V
IN/IN Inputs Accept LVPECL, LVNECL, LVDS Levels
A Logic High on the EN Pin Will Force Q to Logic Low
D[10:0] Can Select Either LVPECL, LVCMOS, or
LVTTL Input Levels
VBB Output Reference Voltage
These are Pb−Free Devices
MARKING
DIAGRAMS*
A
= Assembly Location
WL, L
= Wafer Lot
Y, YY
= Year
W, WW = Work Week
G
= Pb−Free Package
*For additional marking information, refer to
Application Note AND8002/D.
http://onsemi.com
See detailed ordering and shipping information in the package
dimensions section on page 15 of this data sheet.
ORDERING INFORMATION
QFN32
MN SUFFIX
CASE 488AM
32
1
MC100
EP195B
ALYWG
1
32
1
LQFP−32
FA SUFFIX
CASE 873A
MC100
EP195B
AWLYYWWG


Codice articolo simile - MC100EP195BMNR4G

Produttore elettroniciIl numero della parteScheda tecnicaSpiegazioni elettronici
logo
ON Semiconductor
MC100EP195BMNR4G ONSEMI-MC100EP195BMNR4G Datasheet
147Kb / 17P
   3.3V ECL Programmable Delay Chip
June, 2014 ??Rev. 2
More results

Descrizione simile - MC100EP195BMNR4G

Produttore elettroniciIl numero della parteScheda tecnicaSpiegazioni elettronici
logo
ON Semiconductor
MC100EP195B ONSEMI-MC100EP195B_14 Datasheet
147Kb / 17P
   3.3V ECL Programmable Delay Chip
June, 2014 ??Rev. 2
MC10EP195 ONSEMI-MC10EP195_06 Datasheet
220Kb / 20P
   3.3V ECL Programmable Delay Chip
December, 2006 ??Rev. 16
MC100EP195FA ONSEMI-MC100EP195FA Datasheet
127Kb / 20P
   3.3V ECL Programmable Delay Chip
October, 2004 ??Rev. 13
MC100EP196 ONSEMI-MC100EP196 Datasheet
146Kb / 20P
   3.3V ECL Programmable Delay Chip with FTUNE
October, 2004 ??Rev. 10
MC100EP196 ONSEMI-MC100EP196_06 Datasheet
215Kb / 18P
   3.3V ECL Programmable Delay Chip with FTUNE
November, 2006 ??Rev. 12
MC100EP196 ONSEMI-MC100EP196_14 Datasheet
151Kb / 19P
   3.3V ECL Programmable Delay Chip with FTUNE
June, 2014 ??Rev. 16
MC10EP195 ONSEMI-MC10EP195_14 Datasheet
156Kb / 19P
   ECL Programmable Delay Chip
June, 2014 ??Rev. 19
MC10E195 ONSEMI-MC10E195_16 Datasheet
183Kb / 11P
   5V ECL Programmable Delay Chip
July, 2016 ??Rev. 11
MC10E196 ONSEMI-MC10E196_06 Datasheet
158Kb / 12P
   5V ECL Programmable Delay Chip
November, 2006 ??Rev. 9
MC10E195 ONSEMI-MC10E195_06 Datasheet
150Kb / 11P
   5V ECL Programmable Delay Chip
November, 2006 ??Rev. 10
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17


Scheda tecnica Scarica

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEETIT.COM
Lei ha avuto il aiuto da alldatasheet?  [ DONATE ] 

Di alldatasheet   |   Richest di pubblicita   |   contatti   |   Privacy Policy   |   scambio Link   |   Ricerca produttore
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com