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74LVC132AD Scheda tecnica(PDF) 10 Page - NXP Semiconductors |
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74LVC132AD Scheda tecnica(HTML) 10 Page - NXP Semiconductors |
10 / 15 page 74LVC132A_1 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 01 — 15 December 2006 10 of 15 NXP Semiconductors 74LVC132A Quad 2-input NAND Schmitt trigger 15. Package outline Fig 11. Package outline SOT108-1 (SO14) UNIT A max. A1 A2 A3 bp cD(1) E(1) (1) eHE LLp QZ y w v θ REFERENCES OUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm inches 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 8.75 8.55 4.0 3.8 1.27 6.2 5.8 0.7 0.6 0.7 0.3 8 0 o o 0.25 0.1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 1.0 0.4 SOT108-1 X w M θ A A1 A2 bp D HE L p Q detail X E Z e c L v M A (A ) 3 A 7 8 1 14 y 076E06 MS-012 pin 1 index 0.069 0.010 0.004 0.057 0.049 0.01 0.019 0.014 0.0100 0.0075 0.35 0.34 0.16 0.15 0.05 1.05 0.041 0.244 0.228 0.028 0.024 0.028 0.012 0.01 0.25 0.01 0.004 0.039 0.016 99-12-27 03-02-19 0 2.5 5 mm scale SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 |
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