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74ABT623DB Scheda tecnica(PDF) 9 Page - NXP Semiconductors |
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74ABT623DB Scheda tecnica(HTML) 9 Page - NXP Semiconductors |
9 / 15 page 74ABT623_3 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 03 — 22 October 2009 9 of 15 NXP Semiconductors 74ABT623 Octal transceiver with dual enable; non-inverting; 3-state a. Input pulse definition b. Test circuit Test data and VEXT levels are given in Table 9. CL = Load capacitance including jig and probe capacitance. Fig 9. Test circuit for measuring switching times 001aac221 VM VM tW tW 10 % 90 % 90 % 0 V VI VI negative pulse positive pulse 0 V VM VM 90 % 10 % 10 % tf tr tr tf VEXT VCC VI VO mna616 DUT CL RT RL RL G Table 9. Test data Input Load VEXT tr, tf CL RL tPHL, tPLH tPZH, tPHZ tPZL, tPLZ ≤ 2.5 ns 50 pF 500 Ω open open 7.0 V |
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