74ABT623_3

© NXP B.V. 2009. All rights reserved.

Product data sheet

Rev. 03 — 22 October 2009

4 of 15

NXP Semiconductors

74ABT623

Octal transceiver with dual enable; non-inverting; 3-state

5.

Pinning information

5.1 Pinning

5.2 Pin description

6.

Functional description

[1]

H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state.

Fig 4.

Pin configuration SO20

Fig 5.

Pin configuration (T)SSOP20

74ABT623

OEAB

A0

OEBA

A1

B0

A2

B1

A3

B2

A4

B3

A5

B4

A6

B5

A7

B6

GND

B7

001aak828

1

2

3

4

5

6

7

8

9

10

12

11

14

13

16

15

18

17

20

19

74ABT623

OEAB

A0

OEBA

A1

B0

A2

B1

A3

B2

A4

B3

A5

B4

A6

B5

A7

B6

GND

B7

001aak829

1

2

3

4

5

6

7

8

9

10

12

11

14

13

16

15

18

17

20

19

Table 2.

Pin description

Symbol

Pin

Description

OEAB

1

output enable input (active HIGH)

A0 to A7

2, 3, 4, 5, 6, 7, 8, 9

data input or output

B0 to B7

18, 17, 16, 15, 14, 13, 12, 11

data input or output

GND

10

ground (0 V)

OEBA

19

output enable input (active LOW)

20

supply voltage

Table 3.

Function table[1]

Input

Input or output

OEAB

OEBA

An

Bn

L

L

An = Bn

input

H

H

input

Bn = An

LH

Z

Z

H

L

An = Bn

input

H

L

input

Bn = An