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FDG410NZ Scheda tecnica(PDF) 2 Page - Fairchild Semiconductor

Il numero della parte FDG410NZ
Spiegazioni elettronici  Single N-Channel PowerTrench짰 MOSFET 20 V, 2.2 A, 70 m廓
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Produttore elettronici  FAIRCHILD [Fairchild Semiconductor]
Homepage  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

FDG410NZ Scheda tecnica(HTML) 2 Page - Fairchild Semiconductor

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©2009 Fairchild Semiconductor Corporation
FDG410NZ Rev.B
Electrical Characteristics T
J = 25 °C unless otherwise noted
Off Characteristics
On Characteristics
Dynamic Characteristics
Switching Characteristics
Drain-Source Diode Characteristics
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
BVDSS
Drain to Source Breakdown Voltage
ID = 250 µA, VGS = 0 V
20
V
∆BV
DSS
∆T
J
Breakdown Voltage Temperature
Coefficient
ID = 250 µA, referenced to 25 °C
17
mV/°C
IDSS
Zero Gate Voltage Drain Current
VDS = 16 V, VGS = 0 V
1
µA
IGSS
Gate to Source Leakage Current
VGS = ±8 V, VDS = 0 V
±10
µA
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 µA
0.4
0.7
1.0
V
∆V
GS(th)
∆T
J
Gate to Source Threshold Voltage
Temperature Coefficient
ID = 250 µA, referenced to 25 °C
-3
mV/°C
rDS(on)
Static Drain to Source On Resistance
VGS = 4.5 V, ID = 2.2 A
50
70
m
VGS = 2.5 V, ID = 2.0 A
56
77
VGS = 1.8 V, ID = 1.8 A
67
87
VGS = 1.5 V, ID = 1.5 A
83
115
VGS = 4.5 V, ID = 2.2 A,
TJ = 125 °C
71
100
gFS
Forward Transconductance
VDD = 5 V, ID = 2.2 A
11
S
Ciss
Input Capacitance
VDS = 10 V, VGS = 0 V,
f = 1 MHz
400
535
pF
Coss
Output Capacitance
70
95
pF
Crss
Reverse Transfer Capacitance
45
70
pF
Rg
Gate Resistance
2.8
td(on)
Turn-On Delay Time
VDD = 10 V, ID = 2.2 A,
VGS = 4.5 V, RGEN = 6 Ω
5.3
11
ns
tr
Rise Time
2.3
10
ns
td(off)
Turn-Off Delay Time
18
33
ns
tf
Fall Time
2.3
10
ns
Qg
Total Gate Charge
VGS = 4.5 V, VDD = 10 V,
ID = 2.2 A
5.1
7.2
nC
Qgs
Gate to Source Charge
0.6
nC
Qgd
Gate to Drain “Miller” Charge
1.0
nC
IS
Maximum Continuous Drain-Source Diode Forward Current
0.35
A
VSD
Source to Drain Diode Forward Voltage
VGS = 0 V, IS = 0.35 A
(Note 2)
0.6
1.2
V
trr
Reverse Recovery Time
IF = 2.2 A, di/dt = 100 A/µs
11
20
ns
Qrr
Reverse Recovery Charge
2.5
10
nC
Notes:
1. RθJA is determined with the device mounted on a 1 in
2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθJA is determined by
the user's board design.
2. Pulse Test: Pulse Width < 300
µs, Duty cycle < 2.0%.
3: The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
a. 300 °C/W when mounted
on a 1 in2 pad of 2 oz copper.
b. 333 °C/W when mounted on a
minimum pad of 2 oz copper.


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