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UC1875L883B Scheda tecnica(PDF) 5 Page - Texas Instruments |
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UC1875L883B Scheda tecnica(HTML) 5 Page - Texas Instruments |
5 / 19 page 5 UC1875/6/7/8 UC2875/6/7/8 UC3875/6/7/8 Note 1: Phase shift percentage (0% = 0°, 100% = 180°) is defined as θ= 200 T Φ %, where q is the phase shift, and F and T are de- fined in Figure 1. At 0% phase shift, F is the output skew. Note 2: Delay time is defined as delay = T (1/2–(duty cycle)), where T is defined in Fig. 1. Note 3: Ramp offset voltage has a temperature coefficient of about –4mV/°C. Note 4: Zero phase shift voltage has a temperature coefficient of about –2mV/°C. Note 5: Delay time can be programmed via resistors from the delay set pins to ground. Delay time ≅ • 62 5 10 12 . – IDELAY sec. Where IDELAY = De lay s e t voltage RDELAY The recommended range for IDELAY is 25mA £ IDELAY £ 1mA Note 6: Ramp delay to output time is defined in Fig. 2. Note 7: Not production tested at -55°C. Duty Cycle = t/T Period = T TDHL (A to C) = TDHL (B to D) = Φ Phase Shift, Output Skew & Delay Time Definitions UDG-95074 Figure 1 Figure 2 UDG-95075 ELECTRICAL CHARACTERISTICS: Unless otherwise stated, –55°C < TA < 125°C for the UC1875/6/7/8, –25°C < TA < 85°C for the UC2875/6/7/8 and 0°C < TA < 70°C for the UC3875/6/7/8, VC = VIN = 12V, RFREQSET = 12kΩ,CFREQSET = 330pF, RSLOPE = 12kΩ,CRAMP = 200pF, CDELAYSET A-B =CDELAYSET C-D = 0.01µF, IDELAYSET A-B =IDELAYSET C-D = –500µA, TA =TJ. PARAMETER TEST CONDITIONS MIN TYP MAX UNITS Soft-Start/Reset Delay Charge Current VSOFTSTART = 0.5V –20 –9 –3 µA Discharge Current VSOFTSTART = 1V 120 230 µA Restart Threshold 4.3 4.7 V Discharge Level 300 mV Output Drivers Output Low Level IOUT = 50mA 0.2 0.4 V IOUT = 500mA 1.2 2.6 V Output High Level IOUT = –50mA 1.5 2.5 V IOUT = –500mA 1.7 2.6 V Delay Set (UC1875 and UC1876 only) Delay Set Voltage IDELAY = –500µA 2.3 2.4 2.6 V Delay Time, (Note 8) IDELAY = –250µA (Note 5) (UC3875/6/7/8, UC2875/6/7/8) 150 250 400 nsec IDELAY = –250µA (Note 5) (UC1875/6/7/8) 150 250 600 nsec |
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