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ISL12057IBZ Scheda tecnica(PDF) 8 Page - Intersil Corporation |
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ISL12057IBZ Scheda tecnica(HTML) 8 Page - Intersil Corporation |
8 / 17 page 8 FN6755.0 June 15, 2009 IRQ1/FOUT (Interrupt Output 1/Frequency Output) This dual function pin can be used as an alarm interrupt or frequency output pin. The IRQ1/FOUT mode is selected via the control register (address 0Eh). The IRQ1/FOUT is an open drain output. This pin has a default output of 32.768kHz at power-up. • Interrupt Mode. The pin provides an interrupt signal output. This signal notifies a host processor that an alarm has occurred and requests action. • Frequency Output Mode. The pin outputs a clock signal which is related to the crystal frequency. The frequency output is user selectable and enabled via the I2C bus. IRQ2 (Interrupt Output 2) The IRQ2 pin is used as an Alarm1 interrupt or/and Alarm2 interrupt. The IRQ2 mode is selected via the control register (address 0Eh). The IRQ2 is an open drain output. This pin is high impedance at power-up. The pin provides an interrupt signal output. This signal notifies a host processor that an alarm has occurred and requests action. Serial Clock (SCL) The SCL input is used to clock all serial data into and out of the device. The input buffer on this pin is always active (not gated). The SCL pin can accept a logic high voltage up to 5.5V. Serial Data (SDA) SDA is a bi-directional pin used to transfer data into and out of the device. It has an open drain output and may be ORed with other open drain or open collector outputs. The input buffer is always active (not gated) in normal mode. An open drain output requires the use of a pull-up resistor, and it can accept a pull-up voltage up to 5.5V. The output circuitry controls the fall time of the output signal with the use of a slope controlled pull-down. The circuit is designed for 400kHz I2C interface speeds. NOTE: Parts will work with SDA pull-up voltage above the VPULLUP limit but the tAA and tFin the I 2C parameters are not guaranteed. VDD, GND Chip power supply and ground pins. The device will have full operation with a power supply from 1.8V to 3.6VDC, and timekeeping function with a power supply from 1.4V to 1.8V. A 0.1µF decoupling capacitor is recommended on the VDD pin to ground. Functional Description Real Time Clock Operation The Real Time Clock (RTC) uses an external 32.768kHz quartz crystal to maintain an accurate internal representation of second, minute, hour, day of week, date, month, and year. The RTC also has leap-year correction. The RTC also corrects for months having fewer than 31 days and has a bit that controls 24-hour or AM/PM format. The clock will begin incrementing after power-up with valid oscillator condition. ACCURACY OF THE REAL TIME CLOCK The accuracy of the Real Time Clock depends on the frequency of the quartz crystal that is used as the time base for the RTC. Since the resonant frequency of a crystal is temperature dependent, the RTC performance will also be dependent upon temperature. The frequency deviation of the crystal is a function of the turnover temperature of the crystal from the crystal’s nominal frequency. For example, a ~20ppm frequency deviation translates into an accuracy of ~1 minute per month. These parameters are available from the crystal manufacturer. I2C Serial Interface The ISL12057 has an I2C serial bus interface that provides access to the real time clock registers, control and status registers and the alarm registers. The I2C serial interface is compatible with other industry I2C serial bus protocols using a bidirectional data signal (SDA) and a clock signal (SCL). Register Descriptions The registers are accessible following a slave byte of “1101000x” and reads or writes to addresses [00h:0Fh]. The defined addresses and default values are described in Table 1. REGISTER ACCESS The contents of the registers can be modified by performing a byte or a page write operation directly to any register address. The address will wrap around from 0Fh to 00h. The registers are divided into 3 sections. These are: 1. Real Time Clock (7 bytes): Address 00h to 06h. 2. Alarm (7 bytes): Address 07h to 0Dh. 3. Control and Status (2 bytes): Address 0Eh to 0Fh. There are no addresses above 0Fh. A register can be read by performing a random read at any address at any time. This returns the contents of that register location. Additional registers are read by performing a sequential read. For the RTC registers, the read instruction latches all clock registers into a buffer, so an update of the clock does not change the time being read. A sequential read will not result in the output of data from the memory array. At the end of a read, the master supplies a stop condition to end the operation and free the bus. After a read or write instruction, the address remains at the previous address +1 so the user can execute a current address read and continue reading the next register. ISL12057 |
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