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UC1727 Scheda tecnica(PDF) 4 Page - Texas Instruments

Il numero della parte UC1727
Spiegazioni elettronici  Isolated High Side IGBT Driver
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Produttore elettronici  TI [Texas Instruments]
Homepage  http://www.ti.com
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UC1727 Scheda tecnica(HTML) 4 Page - Texas Instruments

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PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Output Driver (cont.)
Turn on Clamp Voltage
I(OUT) = -100mA
7
9
11
V
Fault Clamp Voltage
|I(OUT)| = 100mA
8
10
12.5
V
UVLO Saturation to VEE
I(OUT) = 20mA,VCC no connection
2
3
V
Rise and Fall Times
Cl = 1n, CLAMP = VCC, ROUT = 3
Ω (Note 1)
75
150
ns
Turn On Sequence Timer
Clamped Driver Time
(Note 1)
0.4
1
1.7
µs
Blanking Time
(Note 1)
3
5
7
µs
Fault Manager
Clamped Driver Time
(Note 1)
0.4
1
1.7
µs
Fault Lock Off Time
(Note 1)
15
25
35
µs
FRPLY Saturation
I(FRPLY) = 10mA
1.8
3
V
FRPLY Leakage
FRPLY = VCC
010
µA
Desaturation Detection Comparator
Input Offset Voltage (|vio|)
VCM = VEE+2, VCM = VCC-2
0
20
mV
Input Bias Current
−1.5
10
µA
Delay to Output
C(FRC) = 0 (Note 1)
150
ns
Undervoltage Lock Out
VCC Threshold
14
15.5
17
V
VCC Hysteresis
0.35
V
VEE Threshold
−4.5
−5.5
−6.5
V
VEE Hysteresis
0.5
1
1.5
V
Thermal Shutdown
Threshold
Not tested
175
°C
Hysteresis
Not tested
45
°C
Total Standby Current
I(VCC)
24
30
mA
Unless otherwise stated, these specifications apply for TA =
−55°C to 125°C for the
UC1727, TA =
−40°C to 85°C for the UC2727, TA = 0°C to 70°C for the UC3727,
R(TRC) = 54.9k, C(TRC) = 180pF, R(FRC) = 309K, C(FRC) = 200pF, VCC - VEE =
25V, CLAMP = 9V, TA = TJ, and all voltages are measured with respect to COM.
ELECTRICAL CHARACTERISTICS:
APPLICATION INFORMATION
Figure 1 shows the rectification and detection scheme
used in the UC1727 to derive both power and signal infor-
mation from the input waveform. VCC-VEE is generated by
peak detecting the input signal via the internal bridge rec-
tifier and storing it on external capacitors. COM is gener-
ated by an internal amplifier that maintains PVCC-COM =
16.5V.
Signal detection is performed by the internal hysteresis
comparator which senses the polarity of the input signal
as shown in Figure 2. This is accomplished by setting (or
resetting) the comparator only if the input signal exceeds
0.95
VCC-VEE. In some cases it may be necessary to
add a damping resistor across the transformer secondary
to minimize ringing and eliminate false triggering of the
hysteresis comparator as shown in Figure 3.
UC1727
UC2727
UC3727
Figure 1. Input Stage & Bipolar Supply
Note 1: Guaranteed by design, but not 100% tested in production.
4


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