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UC1625N Scheda tecnica(PDF) 6 Page - Texas Instruments |
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UC1625N Scheda tecnica(HTML) 6 Page - Texas Instruments |
6 / 15 page 6 UC1625 UC2625 UC3625 PDA, PDB, PDC: These outputs can drive the gates of N-Channel power MOSFETs directly or they can drive the bases of power Darlingtons if some form of current limiting is used. They are meant to drive low-side power devices in high-current output stages. Current available from these pins can peak as high as 0.5A. These out- puts feature a true totem-pole output stage. Beware of exceeding IC power dissipation limits when using these outputs for high continuous currents. These outputs pull high to turn a “low-side” device on (active high). PUA, PUB, PUC: These outputs are open-collector, high-voltage drivers that are meant to drive high-side power devices in high-current output stages. These are active low outputs, meaning that these outputs pull low to command a high-side device on. These outputs can drive low-voltage PNP Darlingtons and P-channel MOSFETs directly, and can drive any high-voltage de- vice using external charge-pump techniques, trans- former signal coupling, cascode level-shift transistors, or opto-isolated drive (high-speed opto devices are recom- mended). (See applications). PWR VCC: This supply pin carries the current sourced by the PD outputs. When connecting PD outputs directly to the bases of power Darlingtons, the PWR VCC pin can be current limited with a resistor. Darlington outputs can also be "Baker Clamped" with diodes from collectors back to PWR VCC. (See Applications) Quad Sel: The IC can chop power devices in either of two modes, referred to as “two-quadrant” (Quad Sel low) and “four-quadrant” (Quad Sel high). When two-quadrant chopping, the pull-down power devices are chopped by the output of the PWM latch while the pull-up drivers remain on. The load will chop into one commutation diode, and except for back-EMF, will ex- hibit slow discharge current and faster charge current. Two-quadrant chopping can be more efficient than four-quadrant. When four-quadrant chopping, all power drivers are chopped by the PWM latch, causing the load current to flow into two diodes during chopping. This mode exhibits better control of load current when current is low, and is preferred in servo systems for equal control over accel- eration and deceleration. The Quad Sel input has no ef- fect on operation during braking. RC-Brake: Each time the Tach-Out pulses, the capaci- tor tied to RC-Brake discharges from approximately 3.33V down to 1.67V through a resistor. The tachometer pulse width is approximately T = 0.67 RT CT, where RT and CT are a resistor and capacitor from RC-Brake to ground. Recommended values for RT are 10kΩ to 500k Ω, and recommended values for CT are 1nF to 100nF, allowing times between 5 µs and 10ms. Best ac- curacy and stability are achieved with values in the cen- ters of those ranges. RC-Brake also has another function. If RC-Brake pin is pulled below the brake threshold, the IC will enter brake mode. This mode consists of turning off all three high-side devices, enabling all three low-side devices, and disabling the tachometer. The only things that in- hibit low-side device operation in braking are low-supply, exceeding peak current, OV-Coast com- mand, and the PWM comparator signal. The last of these means that if current sense is implemented such that the signal in the current sense amplifier is propor- tional to braking current, the low-side devices will brake the motor with current control. (See applications) Sim- pler current sense connections will result in uncontrolled braking and potential damage to the power devices. RC-Osc: The UC3625 can regulate motor current using fixed-frequency pulse width modulation (PWM). The RC-Osc pin sets oscillator frequency by means of timing resistor ROSC from the RC-Osc pin to VREF and capaci- tor COSC from RC-Osc to Gnd. Resistors 10kΩ to 100k Ω and capacitors 1nF to 100nF will work best, but frequency should always be below 500kHz. Oscillator frequency is approximately: () F RC OSC OSC = • 2 Additional components can be added to this device to cause it to operate as a fixed off-time PWM rather than a fixed frequency PWM, using the RC-Osc pin to select the monostable time constant. The voltage on the RC-Osc pin is normally a ramp of about 1.2V peak-to-peak, centered at approximately 1.6V. This ramp can be used for voltage-mode PWM control, or can be used for slope compensation in cur- rent-mode control. SSTART: Any time that VCC drops below threshold or the sensed current exceeds the over-current threshold, the soft-start latch is set. When set, it turns on a transistor that pulls down on SSTART. Normally, a capacitor is con- nected to this pin, and the transistor will completely dis- charge the capacitor. A comparator senses when the NPN transistor has completely discharged the capacitor, and allows the soft-start latch to clear when the fault is removed. When the fault is removed, the soft-start ca- pacitor will charge from the on-chip current source. PIN DESCRIPTIONS (cont.) |
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