Motore di ricerca datesheet componenti elettronici
  Italian  ▼
ALLDATASHEETIT.COM

X  

TL16C752BPTRG4 Scheda tecnica(PDF) 3 Page - Texas Instruments

Il numero della parte TL16C752BPTRG4
Spiegazioni elettronici  3.3-V DUAL UART WITH 64-BYTE FIFO
Download  36 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Produttore elettronici  TI [Texas Instruments]
Homepage  http://www.ti.com
Logo TI - Texas Instruments

TL16C752BPTRG4 Scheda tecnica(HTML) 3 Page - Texas Instruments

  TL16C752BPTRG4 Datasheet HTML 1Page - Texas Instruments TL16C752BPTRG4 Datasheet HTML 2Page - Texas Instruments TL16C752BPTRG4 Datasheet HTML 3Page - Texas Instruments TL16C752BPTRG4 Datasheet HTML 4Page - Texas Instruments TL16C752BPTRG4 Datasheet HTML 5Page - Texas Instruments TL16C752BPTRG4 Datasheet HTML 6Page - Texas Instruments TL16C752BPTRG4 Datasheet HTML 7Page - Texas Instruments TL16C752BPTRG4 Datasheet HTML 8Page - Texas Instruments TL16C752BPTRG4 Datasheet HTML 9Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 3 / 36 page
background image
TL16C752B
3.3-V DUAL UART WITH 64-BYTE FIFO
SLLS405A – DECEMBER 1999 – REVISED AUGUST 2000
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Terminal Functions (Continued)
TERMINAL
I/O
DESCRIPTION
NAME
NO.
I/O
DESCRIPTION
IOW
15
I
Write input (active low strobe). A low to high transition on IOW will transfer the contents of the data bus (D0–D7)
from the external CPU to an internal register that is defined by address bits A0–A2 and CSA and CSB
OPA, OPB
32, 9
0
User defined outputs. This function is associated with individual channels A and B. The state of these pins is
defined by the user through the software settings of the MCR register, bit 3. INTA–B are set to active mode
and OP to a logic 0 when the MCR–3 is set to a logic 1. INTA–B are set to the 3-state mode and OP to a logic
1 when MCR-3 is set to a logic 0. See bit 3, modem control register (MCR bit 3). The output of these two pins
is high after reset.
RESET
36
I
Reset. RESET will reset the internal registers and all the outputs. The UART transmitter output and the
receiver input will be disabled during reset time. See TL16C752B external reset conditions for initialization
details. RESET is an active-high input.
RIA, RIB
41, 21
I
Ring indicator (active low). These inputs are associated with individual UART channels A and B. A logic low
on these pins indicates the modem has received a ringing signal from the telephone line. A low to high transition
on these input pins generates a modem status interrupt, if enabled. The state of these inputs is reflected in
the modem status register (MSR)
RTSA, RTSB
33, 22
O
Request to send (active low). These outputs are associated with individual UART channels A and B. A low on
the RTS pin indicates the transmitter has data ready and waiting to send. Writing a 1 in the modem control
register (MCR bit 1) sets these pins to low, indicating data is available. After a reset, these pins are set to high.
These pins only affects the transmit and receive operation when auto RTS function is enabled through the
enhanced feature register (EFR) bit 6, for hardware flow control operation.
RXA, RXB
5, 4
I
Receive data input. These inputs are associated with individual serial channel data to the 752B. During the
local loopback mode, these RX input pins are disabled and TX data is internally connected to the UART RX
input internally.
RXRDYA,
RXRDYB
31, 18
O
Receive ready (active low). RXRDY A and B goes low when the trigger level has been reached or a timeout
interrupt occurs. They go high when the RX FIFO is empty or there is an error in RX FIFO.
TXA, TXB
7, 8
O
Transmit data. These outputs are associated with individual serial transmit channel data from the 752B. During
the local loopback mode, the TX input pin is disabled and TX data is internally connected to the UART RX input.
TXRDYA,
TXRDYB
43, 6
O
Transmit ready (active low). TXRDY A and B go low when there are at least a trigger level numbers of spaces
available. They go high when the TX buffer is full.
VCC
42
I
Power supply inputs.
XTAL1
13
I
Crystal or external clock input. XTAL1 functions as a crystal input or as an external clock input. A crystal can
be connected between XTAL1 and XTAL2 to form an internal oscillator circuit (see Figure 10). Alternatively,
an external clock can be connected to XTAL1 to provide custom data rates.
XTAL2
14
O
Output of the crystal oscillator or buffered clock. See also XTAL1. XTAL2 is used as a crystal oscillator output
or buffered a clock output.


Codice articolo simile - TL16C752BPTRG4

Produttore elettroniciIl numero della parteScheda tecnicaSpiegazioni elettronici
logo
Texas Instruments
TL16C752B-EP TI-TL16C752B-EP Datasheet
454Kb / 35P
[Old version datasheet]   3.3-V DUAL UART WITH 64-BYTE FIFO
TL16C752B-EP TI1-TL16C752B-EP Datasheet
589Kb / 40P
[Old version datasheet]   3.3 V DUAL UART WITH 64-BYTE FIFO
TL16C752BLPTREP TI1-TL16C752BLPTREP Datasheet
589Kb / 40P
[Old version datasheet]   3.3 V DUAL UART WITH 64-BYTE FIFO
TL16C752BTPTREP TI-TL16C752BTPTREP Datasheet
454Kb / 35P
[Old version datasheet]   3.3-V DUAL UART WITH 64-BYTE FIFO
More results

Descrizione simile - TL16C752BPTRG4

Produttore elettroniciIl numero della parteScheda tecnicaSpiegazioni elettronici
logo
Texas Instruments
TL16C752 TI-TL16C752 Datasheet
402Kb / 33P
[Old version datasheet]   3.3-V DUAL UART WITH 64-BYTE FIFO
TL16C752BLPTREP TI1-TL16C752BLPTREP Datasheet
589Kb / 40P
[Old version datasheet]   3.3 V DUAL UART WITH 64-BYTE FIFO
TL16C752B-EP TI-TL16C752B-EP Datasheet
454Kb / 35P
[Old version datasheet]   3.3-V DUAL UART WITH 64-BYTE FIFO
TL16C752D-Q1 TI1-TL16C752D-Q1 Datasheet
907Kb / 53P
[Old version datasheet]   Dual UART With 64-Byte FIFO
logo
NXP Semiconductors
SC16C752 PHILIPS-SC16C752 Datasheet
604Kb / 47P
   Dual UART with 64-byte FIFO
Rev. 04-20 June 2003
logo
Texas Instruments
TL16C752C TI-TL16C752C Datasheet
1Mb / 48P
[Old version datasheet]   DUAL UART WITH 64-BYTE FIFO
TL16C752C TI-TL16C752C_1 Datasheet
1Mb / 50P
[Old version datasheet]   DUAL UART WITH 64-BYTE FIFO
TL16C752C TI-TL16C752C_09 Datasheet
1Mb / 52P
[Old version datasheet]   DUAL UART WITH 64-BYTE FIFO
TL16C752D TI1-TL16C752D Datasheet
1Mb / 56P
[Old version datasheet]   TL16C752D Dual UART With 64-Byte FIFO
TL16C754 TI-TL16C754 Datasheet
488Kb / 39P
[Old version datasheet]   QUAD UART WITH 64-BYTE FIFO
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36


Scheda tecnica Scarica

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEETIT.COM
Lei ha avuto il aiuto da alldatasheet?  [ DONATE ] 

Di alldatasheet   |   Richest di pubblicita   |   contatti   |   Privacy Policy   |   scambio Link   |   Ricerca produttore
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com