TL16C752B

3.3-V DUAL UART WITH 64-BYTE FIFO

SLLS405A – DECEMBER 1999 – REVISED AUGUST 2000

1

POST OFFICE BOX 655303

Additional Enhancements

Crystal (24 MHz Input Clock)

Oscillator or Clock Source (48 MHz Input

Clock)

Receive FIFO Trigger Levels for DMA and

Interrupt Generation

for Software/Hardware Flow Control

– Programmable Xon/Xoff Characters

– Programmable Auto-RTS and Auto-CTS

Character

Received and Transmitted Data

Function

Pulse Width

Characteristics

– 5, 6, 7, or 8 Bit Characters

– Even, Odd, or No Parity Bit Generation

and Detection

– 1, 1.5, or 2 Stop Bit Generation

Both Normal and Sleep Mode

DTR, RI, and CD)

14 15

RESET

DTRB

DTRA

RTSA

OPA

RXRDYA

INTA

INTB

A0

A1

A2

NC

36

35

34

33

32

31

30

29

28

27

26

25

16

1

2

3

4

5

6

7

8

9

10

11

12

D5

D6

D7

RXB

RXA

TXRDYB

TXA

TXB

OPB

CSA

CSB

NC

17 18 19 20

47 46 45 44 43

48

42

40 39 38

41

21 22 23 24

37

13

PACKAGE

(TOP VIEW)

NC – No internal connection

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Copyright

© 2000, Texas Instruments Incorporated