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TL16C552 Scheda tecnica(PDF) 9 Page - Texas Instruments |
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TL16C552 Scheda tecnica(HTML) 9 Page - Texas Instruments |
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9 / 33 page  TL16C552 DUAL ASYCHRONOUS COMMUNICATIONS ELEMENT WITH FIFO SLLS102B – DECEMBER 1990 – REVISED MARCH 1996 9 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PARAMETER MEASUREMENT INFORMATION 2 V 0.8 V CLK (XTAL1) tw1 tw2 fclock = 8 MHz MAX Figure 1. Clock Input (CLK) Voltage Waveform Device Under Test 680 Ω 82 pF† 2.54 V TL16C552 †Includes scope and jig capacitance Figure 2. Output Load Circuit Option Jumpers Data Bus Address Bus Control Bus 9-Pin D Connector 9-Pin D Connector 25-Pin D Connector Serial Channel 1 Buffers Serial Channel 2 Buffers Parallel Port R/C Network Dual Ace and Printer Port TL16C552 Figure 3. Basic Test Configuration |
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