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TL054AID Scheda tecnica(PDF) 4 Page - Texas Instruments |
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TL054AID Scheda tecnica(HTML) 4 Page - Texas Instruments |
4 / 65 page TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TL051Y chip information This chip, when properly assembled, displays characteristics similar to the TL051. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive epoxy or a gold-silicon preform. BONDING PAD ASSIGNMENTS CHIP THICKNESS: 15 MILS TYPICAL BONDING PADS: 4 × 4 MILS MINIMUM TJmax = 150°C TOLERANCES ARE ±10%. ALL DIMENSIONS ARE IN MILS. PIN (4) IS INTERNALLY CONNECTED TO BACKSIDE OF CHIP. + – OUT IN + IN – VCC+ (7) (3) (2) (6) (1) (4) (5) VCC – OFFSET N1 OFFSET N2 63 43 (1) (2) (3) (4) (5) (6) (7) |
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