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SN74AC08DE4 Scheda tecnica(PDF) 4 Page - Texas Instruments |
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SN74AC08DE4 Scheda tecnica(HTML) 4 Page - Texas Instruments |
4 / 15 page SN54AC08, SN74AC08 QUADRUPLE 2INPUT POSITIVEAND GATES SCAS536D − SEPTEMBER 1995 − REVISED OCTOBER 2003 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PARAMETER MEASUREMENT INFORMATION 50% VCC tPLH tPHL tPHL tPLH VOH VOH VOL VOL 50% VCC 50 % VCC VCC 0 V 50% VCC 50% VCC Input (see Note B) Out-of-Phase Output In-Phase Output 50% VCC VOLTAGE WAVEFORMS From Output Under Test CL = 50 pF (see Note A) LOAD CIRCUIT S1 2 × VCC 500 Ω 500 Ω Open S1 TEST tPLH/tPHL Open NOTES: A. CL includes probe and jig capacitance. B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr v 2.5 ns, tf v 2.5 ns. C. The outputs are measured one at a time with one input transition per measurement. Figure 1. Load Circuit and Voltage Waveforms |
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