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SN74ABT16500BDGG Scheda tecnica(PDF) 1 Page - Texas Instruments

Il numero della parte SN74ABT16500BDGG
Spiegazioni elettronici  18-BIT UNIVERSAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
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SN74ABT16500BDGG Scheda tecnica(HTML) 1 Page - Texas Instruments

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SN54ABT16500B, SN74ABT16500B
18-BIT UNIVERSAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS057G – DECEMBER 1990 – REVISED MAY 1997
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D Members of the Texas Instruments
Widebus
™ Family
D State-of-the-Art EPIC-ΙΙB™ BiCMOS Design
Significantly Reduces Power Dissipation
D UBT ™ (Universal Bus Transceiver)
Combines D-Type Latches and D-Type
Flip-Flops for Operation in Transparent,
Latched, or Clocked Mode
D ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015
D Latch-Up Performance Exceeds 500 mA Per
JEDEC Standard JESD-17
D Typical VOLP (Output Ground Bounce)
< 0.8 V at VCC = 5 V, TA = 25°C
D High-Impedance State During Power Up
and Power Down
D Flow-Through Architecture Optimizes PCB
Layout
D Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) and Thin Shrink
Small-Outline (DGG) Packages and 380-mil
Fine-Pitch Ceramic Flat (WD) Package
Using 25-mil Center-to-Center Spacings
description
These 18-bit universal bus transceivers combine
D-type latches and D-type flip-flops to allow data
flow in transparent, latched, and clocked modes.
Data flow in each direction is controlled by
output-enable (OEAB and OEBA), latch-enable
(LEAB and LEBA), and clock (CLKAB and
CLKBA) inputs. For A-to-B data flow, the device
operates in the transparent mode when LEAB is
high. When LEAB is low, the A data is latched if
CLKAB is held at a high or low logic level. If LEAB
is low, the A data is stored in the latch/flip-flop on
the high-to-low transition of CLKAB. OEAB is
active-high. When OEAB is high, the outputs are
active. When OEAB is low, the outputs are in the
high-impedance state.
Data flow for B to A is similar to that of A to B but uses OEBA, LEBA, and CLKBA. The output enables are
complementary (OEAB is active high and OEBA is active low).
Copyright
© 1997, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus, EPIC-
ΙΙB, and UBT are trademarks of Texas Instruments Incorporated.
SN54ABT16500B . . . WD PACKAGE
SN74ABT16500B . . . DGG OR DL PACKAGE
(TOP VIEW)
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OEAB
LEAB
A1
GND
A2
A3
VCC
A4
A5
A6
GND
A7
A8
A9
A10
A11
A12
GND
A13
A14
A15
VCC
A16
A17
GND
A18
OEBA
LEBA
GND
CLKAB
B1
GND
B2
B3
VCC
B4
B5
B6
GND
B7
B8
B9
B10
B11
B12
GND
B13
B14
B15
VCC
B16
B17
GND
B18
CLKBA
GND


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