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SN74ABT125N Scheda tecnica(PDF) 3 Page - Texas Instruments |
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SN74ABT125N Scheda tecnica(HTML) 3 Page - Texas Instruments |
3 / 7 page SN54ABT125, SN74ABT125 QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS SCBS182I – FEBRUARY 1997 – REVISED NOVEMBER 2002 3 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 recommended operating conditions (see Note 4) SN54ABT125 SN74ABT125 UNIT MIN MAX MIN MAX UNIT VCC Supply voltage 4.5 5.5 4.5 5.5 V VIH High-level input voltage 2 2 V VIL Low-level input voltage 0.8 0.8 V VI Input voltage 0 VCC 0 VCC V IOH High-level output current –24 –32 mA IOL Low-level output current 48 64 mA ∆t/∆v Input transition rise or fall rate 10 10 ns/V ∆t/∆VCC Power-up ramp rate 200 200 µs/V TA Operating free-air temperature –55 125 –40 85 °C NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. |
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