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TP2104 Scheda tecnica(PDF) 1 Page - Supertex, Inc |
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TP2104 Scheda tecnica(HTML) 1 Page - Supertex, Inc |
1 / 4 page 1 11/12/01 Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website. TP2104 Advanced DMOS Technology These enhancement-mode (normally-off) transistors utilize a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inher- ent in MOS devices. Characteristic of all MOS structures, these devices are free from thermal runaway and thermally-induced secondary breakdown. Supertex’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. Note: See Package Outline section for dimensions. Package Options Features ❏ Free from secondary breakdown ❏ Low power drive requirement ❏ Ease of paralleling ❏ Low C ISS and fast switching speeds ❏ Excellent thermal stability ❏ Integral Source-Drain diode ❏ High input impedance and high gain ❏ Complementary N- and P-channel devices Applications ❏ Logic level interfaces – ideal for TTL and CMOS ❏ Solid state relays ❏ Battery operated systems ❏ Photo voltaic drives ❏ Analog switches ❏ General purpose line drivers ❏ Telecom switches Absolute Maximum Ratings Drain-to-Source Voltage BVDSS Drain-to-Gate Voltage BV DGS Gate-to-Source Voltage ± 20V Operating and Storage Temperature -55°C to +150°C Soldering Temperature* 300°C * Distance of 1.6 mm from case for 10 seconds. S G D TO-92 BV DSS /RDS(ON) V GS(th) Order Number/Package BV DGS (max) (max) TO-236AB* TO-92 Die -40V 6.0Ω -2.0V TP2104K1 TP2104N3 TP2104ND *Same as SOT-23. All units shipped on 3,000 piece carrier tape reels. Ordering Information Low Threshold P-Channel Enhancement-Mode Vertical DMOS FETs Product marking for SOT-23: P1L ❋ where ❋ = 2-week alpha date code TO-236AB (SOT-23) top view S D G |
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