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74LVXC3245 Scheda tecnica(PDF) 1 Page - STMicroelectronics |
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74LVXC3245 Scheda tecnica(HTML) 1 Page - STMicroelectronics |
1 / 14 page 1/14 August 2004 s HIGH SPEED: tPD = 8ns (MAX.) at TA=25°C VCCA = 3.3V, VCCB = 5.0V s LOW POWER DISSIPATION: ICCA = ICCB = 5µA(MAX.) at TA=25°C s LOW NOISE: VOLP =0.3V (TYP.) at VCCA=3.3V s SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) s BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL s OPERATING VOLTAGE RANGE: VCCA(OPR)= 2.7Vto 3.6V(1.2VData Retention) VCCB(OPR)= 2.7Vto 5.5V(1.2VData Retention) PIN AND FUNCTION COMPATIBLE WITH 74 SERIES C3245 s IMPROVED LATCH-UP IMMUNITY DESCRIPTION The 74LVXC3245 is a dual supply 8 bit configurable low voltage CMOS OCTAL BUS TRANSCEIVER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. Designed for use as an interface between a 3.3V bus and a 3.3V to 5V bus in a mixed 3.3V/5V supply systems, it achieves high speed operation while maintaining the CMOS low power dissipation. This IC is intended for two-way asynchronous communication between data buses and the direction of data transmission is determined by DIR input. The enable input G can be used to disable the device so that the buses are effectively isolated. The A-port interfaces with the 3V bus, the B-port with the 5V bus. All inputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. 74LVXC3245 OCTAL DUAL SUPPLY BUS TRANSCEIVER Figure 1: Pin Connection And IEC Logic Symbols Table 1: Order Codes PACKAGE T & R SOP 74LVXC3245MTR TSSOP 74LVXC3245TTR TSSOP SOP Rev. 4 |
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