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SN74ABT16241DGGR Scheda tecnica(PDF) 1 Page - Texas Instruments

Il numero della parte SN74ABT16241DGGR
Spiegazioni elettronici  16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
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Produttore elettronici  TI [Texas Instruments]
Homepage  http://www.ti.com
Logo TI - Texas Instruments

SN74ABT16241DGGR Scheda tecnica(HTML) 1 Page - Texas Instruments

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SN74ABT16241
16BIT BUFFER/DRIVER
WITH 3STATE OUTPUTS
SCBS347 − MAY 1994
SPICE I/O MODEL
Copyright
1994, Texas Instruments Incorporated
2−1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251−1443
Member of the Texas Instruments
Widebus
 Family
State-of-the-Art EPIC-ΙΙB  BiCMOS Design
Significantly Reduces Power Dissipation
Typical V
OLP (Output Ground Bounce)
< 1 V at VCC = 5 V, TA = 25°C
Distributed V
CC and GND Pin Configuration
Minimizes High-Speed Switching Noise
Flow-Through Architecture Optimizes
PCB Layout
High-Drive Outputs (−32-mA I
OH,
64-mA IOL)
Packaged in Plastic 300-mil Shrink
Small-Outline (SSOP) Packages
description
The SN74ABT16241 is a 16-bit buffer and line
driver designed specifically to improve both the
performance and density of 3-state memory
address drivers, clock drivers, and bus-oriented
receivers and transmitters. The device can be
used as four 4-bit buffers, two 8-bit buffers, or one
16-bit buffer. This device provides true outputs
and complementary output-enable (OE and OE)
inputs.
To ensure the high-impedance state during power
up or power down, OE should be tied to VCC
through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of
the driver. OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined
by the current-sourcing capability of the driver.
The SN74ABT16241 is available in TI’s shrink small-outline package (DL), which provides twice the I/O pin
count and functionality of standard small-outline packages in the same printed-circuit-board area.
The SN74ABT16241 is characterized for operation from − 40
°C to 85°C.
FUNCTION TABLE
INPUTS
OUTPUTS
INPUTS
OUTPUTS
1OE, 4OE
1A, 4A
OUTPUTS
1Y, 4Y
2OE, 3OE
2A, 3A
OUTPUTS
2Y, 3Y
L
H
H
H
H
H
L
LL
H
LL
H
X
Z
L
X
Z
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1OE
1Y1
1Y2
GND
1Y3
1Y4
VCC
2Y1
2Y2
GND
2Y3
2Y4
3Y1
3Y2
GND
3Y3
3Y4
VCC
4Y1
4Y2
GND
4Y3
4Y4
4OE
2OE
1A1
1A2
GND
1A3
1A4
VCC
2A1
2A2
GND
2A3
2A4
3A1
3A2
GND
3A3
3A4
VCC
4A1
4A2
GND
4A3
4A4
3OE
DL PACKAGE
(TOP VIEW)
Widebus and EPIC-
ΙΙB are trademarks of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.


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