ULTRACHIP
High-Voltage Mixed-Signal IC
©1999 ~ 2007
4
ES Specifications
PIN DESCRIPTION
Name
Type
# of Pads
Description
MAIN POWER SUPPLY
VDD
VDD2
VDD3
PWR
9
9
2
VDD2/VDD3 is the analog power supply and it should be connected to
the same power source. VDD is the digital power supply and it
should be connected to a voltage source that is no higher than
VDD2/VDD3.
Please maintain the following relationship:
VDD+1.3V
VDD2/3
VDD
Minimize the trace resistance for VDD and VDD2/VDD3.
VSS
VSS2
GND
12
12
Ground. Connect VSS and VSS2 to the shared GND pin.
Minimize the trace resistance for this node.
LCD POWER SUPPLY & VOLTAGE CONTROL
VB1+ , VB1–
VB0+ , VB0–
PWR
6, 6
6, 6
LCD SEG driving voltages. These are the voltage sources to
provide SEG driving currents. These voltages are generated
internally. Connect a capacitor, CBX, between VBX+ and VBX– .
The resistance of these traces directly affects the driving strength
of SEG electrodes and impacts the image of the LCD module.
Minimize the trace resistance is critical in achieving high quality
image.
VLCD-IN
VLCD-OUT
PWR
2
2
High voltage LCD Power Supply. When internal VLCD is used,
connect these pins together. When external VLCD is used, connect
external VLCD source to VLCDIN pins and leave VLCDOUT open.
Capacitor CL should be connected between VLCD and VSS. In COG
applications, keep the ITO trace resistance under 30
Ω.
NOTE
•
Recommended capacitor values:
CBx : 2.2µF/5V or 300x LCD load capacitance, whichever is higher.
CL : 330nF (25V) is appropriate for most applications.