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AD797AN Scheda tecnica(PDF) 14 Page - Analog Devices

Il numero della parte AD797AN
Spiegazioni elettronici  Ultralow Distortion, Ultralow Noise Op Amp
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Produttore elettronici  AD [Analog Devices]
Homepage  http://www.analog.com
Logo AD - Analog Devices

AD797AN Scheda tecnica(HTML) 14 Page - Analog Devices

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AD797
Rev. F | Page 14 of 20
7
*
*
VOUT
+VS
–VS
AD797
R1
RS
IIN
CS
6
3
4
100Ω
600Ω
20pF TO 120pF
2
*USE THE POWER SUPPLY BYPASSING SHOWN IN FIGURE 35.
Figure 39. I-to-V Converter Connection
THE INVERTING CONFIGURATION
The inverting configuration (see Figure 40) presents a low input
impedance, R1, to the source. For this reason, the goals of both
low noise and input buffering are at odds with one another.
Nonetheless, the excellent dynamics of the AD797 makes
it the preferred choice in many inverting applications, and
with careful selection of feedback resistors, the noise penalties
are minimal. Some examples are presented in Table 5 and
Figure 40.
7
*
*
VOUT
VIN
+VS
–VS
AD797
R2
RL
RS
R1
CL
6
3
4
2
*USE THE POWER SUPPLY BYPASSING SHOWN IN FIGURE 35.
Figure 40. Inverting Amplifier Connection
Table 5. Values for Inverting Circuit
Gain
R1
R2
CL
Noise
(Excluding RS)
−1
1 kΩ
1 kΩ
≈20 pF
3.0 nV/√Hz
−1
300 Ω
300 Ω
≈10 pF
1.8 nV/√Hz
−10
150 Ω
1500 Ω
≈5 pF
1.8 nV/√Hz
DRIVING CAPACITIVE LOADS
The capacitive load driving capabilities of the AD797 are
displayed in Figure 41. At gains greater than 10, usually no
special precautions are necessary. If more drive is desirable,
however, the circuit shown in Figure 42 should be used. For
example, this circuit allows a 5000 pF load to be driven cleanly
at a noise gain ≥2.
100nF
10nF
1pF
100
10
11
1nF
100pF
10pF
CLOSED-LOOP GAIN
k
Figure 41. Capacitive Load Drive Capability vs. Closed-Loop Gain
7
*
*
VOUT
VIN
+VS
–VS
AD797
C1
20pF
200pF
6
3
4
2
33Ω
100Ω
1kΩ
1kΩ
*USE THE POWER SUPPLY BYPASSING SHOWN IN FIGURE 35.
Figure 42. Recommended Circuit for Driving a High Capacitance Load
SETTLING TIME
The AD797 is unique among ultralow noise amplifiers in that it
settles to 16 bits (<150 μV) in less than 800 ns. Measuring this
performance presents a challenge. A special test circuit (see
Figure 43) was developed for this purpose. The input signal was
obtained from a resonant reed switch pulse generator, available
from Tektronix as calibration Fixture No. 067-0608-00. When
open, the switch is simply 50 Ω to ground and settling is purely
a passive pulse decay and inherently flat. The low repetition rate
signal was captured on a digital oscilloscope after being
amplified and clamped twice. The selection of plug-in for the
oscilloscope was made for minimum overload recovery.


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