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M41T315Y-65MQ6 Scheda tecnica(PDF) 11 Page - STMicroelectronics

Il numero della parte M41T315Y-65MQ6
Spiegazioni elettronici  Serial access phantom RTC supervisor
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Produttore elettronici  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
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M41T315Y, M41T315V, M41T315W
Operation
11/30
2.1
Non-volatile supervisor operation
A switch is provided to direct power from the battery input or VCCI to VCCO with a maximum
voltage drop of 0.3 Volts. The VCCO output pin is used to supply uninterrupted power to
CMOS SRAM. The M41T315Y/V/W safeguards the clock and RAM data by power-fail
detection and write protection.
Power-fail detection occurs when VCCI falls below VPFD which is set by an internal bandgap
reference. The M41T315Y/V/W constantly monitors the VCCI supply pin. When VCCI is less
than VPFD, power-fail circuitry forces the chip enable output (CEO) to VCCI or VBAT-0.2 volts
for external RAM write protection. During nominal supply conditions, CEO will track CEI with
a propagation delay. Internally, the M41T315Y/V/W aborts any data transfer in progress
without changing any of the device registers and prevents future access until VCCI exceeds
VPFD. Figure 5 on page 9 illustrates a typical RAM/clock interface.
Figure 6.
Read mode waveforms
Table 2.
Operating modes
Mode
VCC
CEI
OE
WE
DQ
Power
Deselect
4.5 to 5.5V
or
3.0 to 3.6V
or
2.7 to 3.3V
VIH
X
X
Hi-Z
Hi-Z
Standby
WRITE
VIL
XVIL
DIN
Hi-Z
Active
READ
VIL
VIL
VIH
Hi-Z
DOUT
Active
READ
VIL
VIH
VIH
Hi-Z
Hi-Z
Active
Deselect
VSO to VPFD (min)
(1)
X
X
X
Hi-Z
Hi-Z
CMOS standby
Deselect
≤ VSO(1)
X
X
X
Hi-Z
Hi-Z
Battery back-up mode
1.
See Table 11 on page 21 for details.
DATA OUTPUT VALID
WE
CEI
OE
Q
tCW
tCO
tRC
tOW
tCOE
tODO
tRR
tOD
tOE
tOEE
AI04259


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