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74LVQ574M Scheda tecnica(PDF) 5 Page - STMicroelectronics |
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74LVQ574M Scheda tecnica(HTML) 5 Page - STMicroelectronics |
5 / 10 page CAPACITIVE CHARACTERISTICS Symb ol Parameter Test Co nditi ons Valu e Un it VCC (V) TA =25 oC -40 to 85 oC Min. T yp. Max. Mi n. Max. CIN Input Capacitance 3.3 4 pF COUT Output Capacitance 3.3 10 pF CPD Power Dissipation Capacitance (note 1) 3.3 fIN = 10 MHz 15 pF 1) CPD isdefined as the value of the IC’sinternal equivalent capacitance which is calculated fromthe operating current consumption without load. (Referto Test Circuit).Average operting current can be obtained by the following equation. ICC(opr) = CPD • VCC • fIN +ICC/8(per FlipFlop) AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, RL = 500 Ω, Input tr =tf =3 ns) Symb ol Parameter T est Con ditio n Valu e Un it VCC (V) TA =25 oC -40 to 85 oC Min. T yp. Max. Mi n. Max. tPLH tPHL Propagation Delay Time CK to Q 2.7 7.5 17.0 18.0 ns 3.3 (*) 6.0 11.0 12.0 tPLZ tPHZ Output Disable Time 2.7 8.0 20.0 21.0 ns 3.3 (*) 6.5 14.0 15.0 tPZL tPZH Output Enable Time 2.7 8.0 18.0 19.0 ns 3.3 (*) 6.5 12..0 13.0 tw Clock pulse Width, HIGH or LOW 2.7 2.0 5.0 6.0 ns 3.3 (*) 1.5 4.0 4.0 tsL tsH Setup Time D to CK HIGH or LOW 2.7 0.0 2.5 3.0 ns 3.3 (*) 0.0 2.0 2.5 thL thH Hold Time D to CK HIGH or LOW 2.7 0.0 2.5 3.0 ns 3.3 (*) 0.0 2.0 2.5 fMAX Maximum Clock Frequency 2.7 80 150 70 MHz 3.3 (*) 100 180 90 tOSLH tOSHL Output to Output Skew Time (note 1, 2) 2.7 0.5 1.0 1.5 ns 3.3 (*) 0.5 1.0 1.5 1) Skew is defined as the absolute value of the difference between the actual propagation delay for any twooutputs of the same device switching in the same direction, either HIGH or LOW (tOSLH =|tPLHm -tPLHn|, tOSHL =|tPHLm -tpHLn|) 2) Parameter guaranteed by design (*) Voltage range is 3.3V ± 0.3V 74LVQ574 5/10 |
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