AD1882

Rev. 0

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Page 9 of 16

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July 2007

Table 8. AD1882 Pin Descriptions

Mnemonic

Pin No.

Function

Description

DIGITAL INTERFACE

SDATA_OUT

BIT_CLK

SDATA_IN

SYNC

RESET

5

6

8

10

11

I

I

I/O

I

I

Link Serial Data Output. AD1882 input stream. Clocked on both edges of the

BIT_CLK.

Link Bit Clock. 24.000 MHz serial data clock.

Link Serial Data Input. AD1882 output stream Clocked only on one edge of BIT_CLK.

Link Frame Sync.

Link Reset. AD1882 master hardware reset

DIGITAL I/O

GPIO_0

GPIO_1/EAPD

S/PDIF_OUT

2

47

48

I/O

I/O

O

General Purpose Input/Output Pin. Digital signal used to control external circuitry.

General Purpose Input/Output Pin/EAPD Pin. Digital signal used to control external

S/PDIF_OUT. Supports S/PDIF output.

JACK SENSE AND EAPD

SENSE_A/SRC_B

SENSE_B/SRC_A

13

34

I/O

I/O

JACK SENSE A-D Input/Sense B Drive.

JACK SENSE E-H Input/Sense A Drive.

ANALOG I/O

PCBEEP

PORT-E_L

PORT-E_R

PORT-F_L

PORT-F_R

CD_L

CD_GND

CD_R

PORT-B_L

PORT-B_R

PORT-C_L

PORT-C_R

PORT-D_L

PORT-D_R

PORT-A_L

MONO_OUT

PORT-A_R

PORT-G_L

PORT-G_R

12

14

15

16

17

18

19

20

21

22

23

24

35

36

39

40

41

43

44

LI

LI, MIC, LO, SWAP

LI, MIC, LO, SWAP

I/O

I/O

LI

LI

LI

LI, MIC, HP, LO

LI, MIC, HP, LO

LI, MIC, LO

LI, MIC, LO

LI, HP, LO

LI, HP, LO

LI, MIC, HP, LO

LO

LI, MIC, HP, LO

LO, SWAP

LO, SWAP

Monaural Input from System for Analog PCBeep.

Auxiliary Input/Output Left Channel.

Auxiliary Input/Output Right Channel.

Auxiliary Input/Output Left Channel.

Auxiliary Input/Output Right Channel.

CD Audio Left Channel.

CD-Audio-Analog-Ground-Reference (for Differential CD Input). Must be connected

to AGND via 0.1 mF capacitor if not in use as CD_GND.

CD Audio Right Channel.

Front Panel Stereo MIC/Line-In.

Front Panel Stereo MIC/Line-In.

Rear Panel Stereo MIC/Line-In.

Rear Panel Stereo MIC/Line-In.

Rear Panel Headphone/Line-Out.

Rear Panel Headphone/Line-Out.

Front Panel Headphone/Line-Out.

Monaural Output to Internal Speaker or Telephony Subsystem Speakerphone.

Front Panel Headphone/Line-Out.

Rear Panel C/LFE Output.

Rear Panel C/LFE Output.

FILTER/REFERENCE

MIC_BIAS-B

MIC_BIAS-C

MIC_BIAS-E

28

29

31

O

O

O

Switchable Microphone Bias. For use with Port B (Pins 21, 22).

Switchable Microphone Bias. For use with Port C (Pins 23, 24).

Switchable Microphone Bias. For use with Port E (Pins 14, 15).

1

O

CAUTION: DO NOT APPLY 3.3 V TO THIS PIN!

Filter connection for internal core voltage regulator.

This pin must be connected to filter caps: 10

μF, 1.0 μF, and 0.1 μF connected in

VREF_FLT

27

O

Voltage Reference Filter. This pin must be connected to filter caps: 1.0

μF and 0.1μF

The symbols used in this table are defined as: I = Input, O = Output, LI = Line level input, LO = Line level output, HP = Output capable of

driving headphone load, MIC = Input supports microphones with MIC bias and boost amplifier, SWAP = Outputs can swap L/R channels

(typically used to support C/LFE or shared C/LFE function).