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TA2152FLG Scheda tecnica(PDF) 6 Page - Toshiba Semiconductor |
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TA2152FLG Scheda tecnica(HTML) 6 Page - Toshiba Semiconductor |
6 / 18 page TA2152FLG 2006-04-19 6 (3) Adjustment of DC output voltage Please perform the OUT ADJ pin (pin 10) as follows by the power supply of VCC1 and VCC2. • If a boost voltage is applied to VCC1, VCC2 is connected to a battery and the difference between VCC1 and VCC2 is greater than or equal to 0.7 V, short pins 10 and 11 together. In this case the DC output voltage will be 2 VCC2 . • If the difference between VCC1 and VCC2 is less than 0.7 V, or if VCC1 and VCC2 are connected to the same power supply, leave pin 10 open. In these cases the DC output voltage will be 2 V 0.7 VCC2 − . However, when the voltage level of VCC2 is high, the DC output voltage is will be set to approximately 1.4 V. (4) RF IN pin The ripple rejection ratio can by improved by connecting a capacitor to this pin. Connection of a capacitor is recommended, particularly for output-coupling type. (5) Output application of power amplifier For output-coupling type the center amplifier is not used with the result that current consumption is low. Please set the C-AMP SW pin (pin 13) accordingly. Output-coupling type: Pin 13 is connected to GND. OCL type: Pin 13 is open. RR − C (RF IN) RF IN capacitance C (µF) 80 70 60 50 30 40 0.1 0.2 0.5 1 2 5 10 Output-coupling type VCC1 = 2.4 V VCC2 = 1.2 V (ripple signal applied) fr = 100 Hz Vr = −20dBV BIAS IN = 4.7 µF Open Figure 3 Improvement of ripple rejection ratio |
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