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SM5301BS Scheda tecnica(PDF) 5 Page - Nippon Precision Circuits Inc |
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SM5301BS Scheda tecnica(HTML) 5 Page - Nippon Precision Circuits Inc |
5 / 15 page SM5301BS SEIKO NPC CORPORATION —5 Electrical Characteristics Input and Output Characteristics VCC = 4.5 to 5.5V, Ta = – 25 to 85°C unless otherwise noted. Refer to “Measurement Circuit”. Parameter Symbol Condition Rating Unit Test level min typ max Supply current 1 ICC1 VCC = 5.5V, RFC = 820Ω to GND, VFC = 0.2V, DISABLE = "L" 70 100 130 mA I Supply current 2 ICC2 VCC = 5.5V, RFC = 820Ω to GND, VFC = 1.6V, DISABLE = "L" 90 120 160 mA I Supply current 3 ICC3 VCC = 5.5V, RFC = 820Ω to GND, VFC = 0.2V, DISABLE = "H" 1 2.5 5 mA I Output gain error 1 ∆AV1 Gain = 0dB/6dB, VCC = 4.75 to 5.25V, Ta = 0 to 70°C –– ± 0.5 dB I Output gain error 2 ∆AV2 Gain = 0dB/6dB, Ta = – 25 to 85°C– – ± 1dB I Maximum output voltage Vout RL = 75Ω to GND, Gain = 6dB 2.4 – – Vp-p I DISABLE-mode input impedance (pull-down) RIN1 RINA/YINA, RINB/YINB, GINA/UINA, GINB/UINB, BINA/VINA, BINB/VINB 40 50 60 k Ω I Clamp response time Tclamp Time for 90% output signal change for 10mV input signal, CIN = 0.1µF –8– ms II Maximum input amplitude VI AC coupling input, Gain = 6dB – – 1.4 Vp-p I Maximum overshoot VOS 2Vp-p pulse output – 10 – % II Maximum load capacitance CL BOUT/VOUT, GOUT/UOUT, ROUT/YOUT – – 15 pF II Output drive load RL one load unit = 150Ω – – 2 load I Channel-to-channel gain difference dG Between R/G/B, fc/2 [Hz] – – 0.5 dB I Channel-to-channel phase difference d φ Between R/G/B, fc/2 [Hz] – 3.5 – degree II Output harmonic distortion THD Vout = 2Vp-p, f = 1MHz – 1.5 – % II Power supply rejection ratio PSRR VCC = 0.5Vp-p, f = 100kHz – 35 – dB II Output short-circuit current ISC – – 100 mA II Logic HIGH-level input voltage 1 VIH1 DISABLE, MUXSEL, THROUGH 2.5 – – V I Logic LOW-level input voltage 1 VIL1 DISABLE, MUXSEL, THROUGH – – 1.0 V I Logic HIGH-level input voltage 2 VIH2 GSB1, GSG1, GSR1 VCC − 0.5 – – V I Logic LOW-level input voltage 2 VIL2 GSB1, GSG1, GSR1 – – 0.5 V I Logic pull-up resistance RIN2 GSB1, GSG1, GSR1 32 40 48 k Ω I Logic pull-down resistance RIN3 DISABLE, MUXSEL, THROUGH 40 50 60 k Ω I |
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