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FDG6342L Scheda tecnica(PDF) 2 Page - Fairchild Semiconductor |
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FDG6342L Scheda tecnica(HTML) 2 Page - Fairchild Semiconductor |
2 / 4 page www.fairchildsemi.com 2 ©2007 Fairchild Semiconductor Corporation FDG6342L Rev.B1 Electrical Characteristics T J = 25°C unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVIN VIN Breakdown Voltage ID = -250µA, VON/OFF = 0V 8 V ILoad Zero Gate Voltage Drain Current VIN = -6.4V, VON/OFF = 0V –1 µA IFL Leakage Current, Forward VIN = 8V, VON/OFF = 0V 10 µA IRL Leakage Current, Reverse VIN = -8V, VON/OFF = 0V –10 µA On Characteristics VON/OFF(th) Gate Threshold Voltage VIN = VON/OFF, ID = -250µA 0.65 0.8 1.5 V rDS(on) Static Drain to Source On Resistance (Q2) VIN = 4.5V, ID = –1.5A 125 150 m Ω VIN = 2.5V, ID = –1.3A 150 195 VIN = 1.8V, ID = –1.1A 200 280 VIN = 1.5V, ID = –0.9A 250 480 Static Drain to Source On Resistance (Q1) VIN = 4.5V, ID = 0.4A 2.6 4.0 Ω VIN = 2.7V, ID = 0.2A 3.3 5.0 (note 2) Drain-Source Diode Characteristics IS Maximum Continuous Drain to Source Diode Forward Current –0.25 V VSD Source to Drain Diode Forward Voltage VON/OFF = 0V, IS = –0.25A (Note 2) –0.6 –1.2 V NOTES: 1. RθJA is determined with the device mounted on a 1in 2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθJA is determined by the user's board design. 2. Pulse Test: Pulse Width < 300 µs, Duty cycle < 2.0%. FDG6342LLoad Switch Application circuit External Component Recommendation: For additional in-rush current control, R2 and C1 can be added. For more information, see application note AN1030 IN C1 Q1 OUT Q2 R1 R2 ON/OFF LOAD a. 350°C/W when mounted on a 1 in2 pad of 2 oz copper . b. 415°C/W when mounted on a minimum pad of 2 oz copper. |
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