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STAC9758 Scheda tecnica(PDF) 6 Page - Integrated Device Technology |
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STAC9758 Scheda tecnica(HTML) 6 Page - Integrated Device Technology |
6 / 119 page STAC9758/9759 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ PC AUDIO IDT™ 6 STAC9758/9759 V 1.2 1206 HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™ LIST OF TABLES Table 1. Clock Mode Configuration ............................................................................................................... 19 Table 2. Common Clocks and Sources ......................................................................................................... 19 Table 3. Recommended CODEC ID strapping .............................................................................................. 28 Table 4. AC-Link Output Slots (Transmitted from the Controller) .................................................................. 31 Table 5. The AC-Link Input Slots (Transmitted from the CODEC) ................................................................ 32 Table 6. VRA Behavior .................................................................................................................................. 33 Table 7. Output Slot 0 Bit Definitions ............................................................................................................. 36 Table 8. Command Address Port Bit Assignments ........................................................................................ 37 Table 9. Input Slot 1 Bit Definitions ............................................................................................................... 39 Table 10. Status Address Port Bit Assignments ............................................................................................ 40 Table 11. Status Data Port Bit Assignments .................................................................................................. 40 Table 12. Primary CODEC Addressing: Slot 0 Tag Bits ................................................................................ 42 Table 13. Secondary CODEC Addressing: Slot 0 Tag Bits ........................................................................... 42 Table 14. AC-Link Slot Definitions ................................................................................................................. 43 Table 15. AC-Link Input Slots Dedicated To Audio ....................................................................................... 43 Table 16. Audio Interrupt Slot Definitions ...................................................................................................... 44 Table 17. Programming Registers ................................................................................................................. 48 Table 18. Digital PC Beep Examples ............................................................................................................. 54 Table 19. AMAP Compliant ...........................................................................................................................76 Table 20. Hardware Supported Sample Rates .............................................................................................. 77 Table 21. Gain or Attenuation Examples ....................................................................................................... 94 Table 22. Sensed Bits ................................................................................................................................... 96 Table 23. Low Power Modes ....................................................................................................................... 105 Table 24. CODEC ID Selection ................................................................................................................... 107 Table 25. Secondary CODEC Register Access Slot 0 Bit Definitions ......................................................... 108 Table 26. Test Mode Activation ................................................................................................................... 109 Table 27. ATE Test Mode Operation ........................................................................................................... 109 Table 28. Digital Connection Signals ........................................................................................................... 110 Table 29. Analog Connection Signals ......................................................................................................... 111 Table 30. Filtering and Voltage References ................................................................................................ 112 Table 31. Power and Ground Signals .......................................................................................................... 112 |
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