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TSA1203 Scheda tecnica(PDF) 6 Page - STMicroelectronics |
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TSA1203 Scheda tecnica(HTML) 6 Page - STMicroelectronics |
6 / 30 page Dynamic characteristics TSA1203 6/30 3 Dynamic characteristics Dynamic characteristics are measured under the following conditions, unless otherwise specified: AVCC = DVCC = VCCB = 2.5 V, FS = 40 Msps, Fin=10.13 MHz, Vin@ -1 dBFS, VREFP=0.8 V, VREFM=0 V, Tamb = 25° C. 4 Timing characteristics Timing characteristics are measured under the following conditions, unless otherwise specified: AVCC = DVCC = VCCB = 2.5 V, FS = 40 Msps, Fin=10.13 MHz, Vin@ -1 dBFS, VREFP=0.8 V, VREFM=0 V, Tamb = 25° C. Table 2. Dynamic characteristics Symbol Parameter Min Typ Max Unit SFDR Spurious free dynamic range -75 -59.5 dBc SNR Signal to noise ratio 60.7 67 dB THD Total harmonics distortion -73 -58 dBc SINAD Signal to noise and distortion ratio 56.5 66 dB ENOB Effective number of bits 9.1 10.8 bits Table 3. Timing characteristics Symbol Parameter Test conditions Min Typ Max Unit FS Sampling frequency 0.5 40 MHz DC Clock duty cycle 45 50 55 % TC1 Clock pulse width (high) 22.5 25 ns TC2 Clock pulse width (low) 22.5 25 ns Tod Data output delay (clock edge to data valid) 10 pF load capacitance 9ns Tpd I Data pipeline delay for I channel 7 cycles Tpd Q Data pipeline delay for Q channel 7.5 cycles Ton Falling edge of OEB to digital output valid data 1ns Toff Rising edge of OEB to digital output tri- state 1ns |
Codice articolo simile - TSA1203_06 |
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Descrizione simile - TSA1203_06 |
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