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TDA1305T Scheda tecnica(PDF) 3 Page - NXP Semiconductors |
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TDA1305T Scheda tecnica(HTML) 3 Page - NXP Semiconductors |
3 / 20 page 1995 Dec 08 3 Philips Semiconductors Preliminary specification Stereo 1fs data input up-sampling filter with bitstream continuous dual DAC (BCC-DAC2) TDA1305T QUICK REFERENCE DATA Note 1. All VDD and VSS pins must be connected to the same supply. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VDDD digital supply voltage note 1 3.4 5.0 5.5 V VDDA analog supply voltage note 1 3.4 5.0 5.5 V VDDO operational amplifier supply voltage note 1 3.4 5.0 5.5 V IDDD digital supply current VDDD =5V; at code 00000H − 30 − mA IDDA analog supply current VDDA =5V; at code 00000H − 5.5 8 mA IDDO operating amplifier supply current VDDO =5V; at code 00000H − 6.5 9 mA VFS(rms) full-scale output voltage (RMS value) VDDD =VDDA =VDDO = 5 V 1.425 1.5 1.575 V (THD + N)/S total harmonic distortion plus noise-to-signal ratio at 0 dB signal level −−90 −81 dB − 0.003 0.009 % at −60 dB signal level −−44 −40 dB − 0.63 0.1 % at −60 dB signal level; A-weighted −−46 − dB − 0.5 − % S/N signal-to-noise ratio at bipolar zero A-weighting; at code 00000H 100 108 − dB BRns input bit rate at data input fs = 48 kHz; normal speed −− 3.072 Mbits BRds input bit rate at data input fs = 48 kHz; double speed −− 6.144 Mbits fsys system clock frequency 6.4 − 18.432 MHz TCFS full scale temperature coefficient at analog outputs (VOL and VOR) −±100 × 10−6 − Tamb operating ambient temperature −30 − +85 °C |
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