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TDA1305T Scheda tecnica(PDF) 10 Page - NXP Semiconductors |
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TDA1305T Scheda tecnica(HTML) 10 Page - NXP Semiconductors |
10 / 20 page 1995 Dec 08 10 Philips Semiconductors Preliminary specification Stereo 1fs data input up-sampling filter with bitstream continuous dual DAC (BCC-DAC2) TDA1305T QUALITY SPECIFICATION In accordance with “SNW-FQ-611E”. The number of this quality specification can be found in the “Quality Reference Handbook”. The handbook can be ordered using the code 9398 510 63011. DIGITAL CHARACTERISTICS VDD = 3.4 to 5.5 V; VSS =0V; Tamb = −40 to +85 °C; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply VDDD digital supply voltage note 1 3.4 5.0 5.5 V IDDD digital supply current VDDD =5V; at code 00000H − 30 40 mA VDDA analog supply voltage note 1 3.4 5.0 5.5 V IDDA analog supply current VDDA =5V; at code 00000H − 5.5 8 mA VDDO operational amplifier supply voltage note 1 3.4 5.0 5.5 V IDDO operational amplifier supply current VDDO =5V; at code 00000H − 6.5 9 mA RR ripple rejection to VDDA note 2 − 25 − dB System clock input fsys system frequency fsys = 384fs 9.6 16.93 18.4 MHz fsys = 256fs 6.4 11.29 12.28 MHz VIL LOW level input voltage note 3 −0.5 − 0.2VDD V VIH HIGH level input voltage note 3 0.8VDD − VDD + 0.5 V I LI input leakage current note 4 −− 10 µA Ci input capacitance −− 10 pF Tcy clock cycle time fsys = 384fs 104 59.1 54.2 ns fsys = 256fs 156 88.6 81.3 ns Digital inputs; WS, BCK, DATA, DSMB, MUSB, DEEM1, DEEM2, ATSB, CLKS1, CLKS2, TEST1 and TEST2 VIL LOW level input voltage note 3 −0.5 − 0.3VDD V VIH HIGH level input voltage note 3 0.7VDD − VDD + 0.5 V I LI input leakage current note 4 −− 10 µA Ci input capacitance −− 10 pF Digital output; CDEC VOL LOW level output voltage IOL = 0.4 mA 0 − 0.5 V VOH HIGH level output voltage IOH = −0.2 mA VDD − 0.5 − VDD V tr output rise time note 5 −− 20 ns tf output fall time note 5 −− 20 ns CL load capacitance −− 30 pF |
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