UC1602I
65x102 Matrix LCD Controller-Drivers
Rev. 0.54 10/12/2001
7
CONTROL REGISTERS
UC1602I contains registers which controls the chip operation. These registers can be modified by
commands. The commands supported by UC1602I are described in the next section.
Name:
The Symbolic reference of the register byte.
Note that, some symbol names refers to collection of bits (flags) within one register byte.
Default:
Value after Power-up-Reset and System-Reset.
“PIN” means default value depends on the connection of associated configuration pin(s).
Name
Bits
Default
Description
MR
1
1H
Multiplexing Rate: Number of pixel rows plus icon row.
0: 49
1: 65
SL
6
0H
Start Line. Mapping from Row0 to Display Data RAM.
CR
8
0H
Return Column Address.
CA
8
0H
Display Data RAM Column Address
(Used in Host to Display Data RAM access)
PA
4
0H
Display Data RAM Page Address
(Used in Host to Display Data RAM access)
BR
2
2H
Bias Ratio. The ratio between VLCD and VD.
TC
2
0H
Temperature Compensation (per
oC).
00: 0.0%
01: -0.05%
10: -0.1%
11: -0.2%
GN
2
3H
Gain = VD / VPM
PM
6
10H
Electronic Potential Meter to generate VPM from VREF
OM
2
0
Operating Modes
10: Sleep
11: Normal
01: (Not used)
00: Reset
BZ
1
–
Busy with internal processes (reset, changing mode, etc.)
OK for Display RAM read/write access.
RS
1
Reset in progress, Host Interface not ready
PC
3
07H
Power Control.
PC[0]
0: LCD load < 12nF
1: LCD load > 12nF
PC[2:1] 00: External VLCD
01: 4x Pump
10: 5x Pump
11: 6x Pump
APC0
8
6CH
Advanced Program Control. Default value should work fine.