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TB6560HQ Scheda tecnica(PDF) 3 Page - Toshiba Semiconductor |
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TB6560HQ Scheda tecnica(HTML) 3 Page - Toshiba Semiconductor |
3 / 31 page TB6560HQ/FG 2006-05-31 3 Pin Functions Pin No. HQ FG I/O Symbol Functional Description 1 42 Input TQ2 Torque setting input (current setting) (built-in pull-down resistor) 2 43 Input TQ1 Torque setting input (current setting) (built-in pull-down resistor) 3 45 Input CLK Step transition, clock input (built-in pull-down resistor) 4 47 Input ENABLE H: Enable; L: All output OFF (built-in pull-down resistor) 5 48 Input RESET L: Reset (output is reset to its initial state) (built-in pull-down resistor) 6 50/51 ⎯ SGND Signal ground (control side) (Note 1) 7 53 ⎯ OSC Connects to and oscillates CR. Output chopping. 8 55/56 Input VMB Motor side power pin (B phase side) (Note 1) 9 61/62 Output OUT_BM OUT_B output (Note 1) 10 1 ⎯ PGNDB Power ground 11 2/3/4 ⎯ NFB B channel output current detection pin (resistor connection). Short the two pins for FG. (Note 1) 12 6/7 Output OUT_BP OUT_B output (Note 1) 13 10/11 Output OUT_AM OUT_A output (Note 1) 14 13/14/15 ⎯ NFA A channel output current detection pin (resistor connection). Short the two pins for FG. (Note 1) 15 16 ⎯ PGNDA Power ground 16 19/20 Output OUT_AP OUT_A output (Note 1) 17 23 Output MO Initial state detection output. ON when in initial state (open drain). 18 25/26 Input VMA Motor side power pin (A phase side) (Note 1) 19 28 Output Protect When TSD, ON (open drain). Normal Z. 20 30/31 Input VDD Control side power pin. (Note 1) 21 33 Input CW/CCW Forward/Reverse toggle pin. L: Forward; H: Reverse (built-in pull-down resistor) 22 35 Input M2 Excitation mode setting input (built-in pull-down resistor) 23 36 Input M1 Excitation mode setting input (built-in pull-down resistor) 24 38 Input DCY2 Current Decay mode setting input (built-in pull-down resistor) 25 39 Input DCY1 Current Decay mode setting input (built-in pull-down resistor) HQ: No Non-connection (NC) FG: Other than the above pins, all are NC (Since NC pins are not connected to the internal circuit, a potential can be applied to those pins.) All control input pins: Pull-down resistor 100 k Ω (typ.) Note 1: If the FG pin number column indicates more than one pin, the indicated pins should be tied to each other at a position as close to the pins as possible. (The electrical characteristics of the relevant pins in this document refer to those when they are handled in that way.) <Terminal circuits> Input pins (M1, M2, CLK, CW/CCW, ENABLE and RESET) Output ins (MO, PROTECT) VDD 100 Ω 100 Ω |
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