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MC7448THX1267NC Scheda tecnica(PDF) 4 Page - Freescale Semiconductor, Inc

Il numero della parte MC7448THX1267NC
Spiegazioni elettronici  Hardware Specifications Addendum for the MC7448T xxnnnnmx Series
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Produttore elettronici  FREESCALE [Freescale Semiconductor, Inc]
Homepage  http://www.freescale.com
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MPC7448 Hardware Specifications Addendum for the MC7448Txxnnnnmx Series, Rev. 2
4
Freescale Semiconductor
General Parameters
5.2.1 Clock AC Specifications
Table 8 provides the clock AC timing specifications for the MPC7448 part numbers discussed here.
NOTE
The core frequency information in this table applies when the device
operates at the nominal core voltage indicated in Table 4. For core
frequency specifications at derated core voltage conditions, see Section 5.3,
“Voltage and Frequency Derating.”
Table 7. Power Consumption for MPC7448 at Maximum Rated Frequency
Die
Junction
(Tj) (•C)
C)
Maximum Processor Core Frequency
(Speed Grade, MHz)
Unit
Notes
1000N
1267N 7
1400N
1700L
Full-Power Mode
Typical
65
9.5
8.4
11.0
21.0
W
1, 2
Thermal
105
12.0
10.3
13.7
25.6
W
1, 5
Maximum
105
13.9
12.0
15.9
29.8
W
1, 3
Nap Mode
Typical
105
6.5
6.5
8.3
13.0
W
1, 6
Sleep Mode
Typical
105
6.3
6.3
8.0
12.5
W
1, 6
Deep Sleep Mode (PLL Disabled)
Typical
105
6.0
6.0
7.7
12.0
W
1, 6
Notes:
1. These values specify the power consumption for the core power supply (VDD) at nominal voltage and apply to all valid
processor bus frequencies and configurations. The values do not include I/O supply power (OVDD) or PLL supply power
(AVDD). OVDD power is system dependent but is typically < 5% of VDD power. Worst case power consumption for
AVDD <13mW.
2. Typical nominal power consumption is an average value measured at the nominal recommended VDD (see Table 4) and
65
°C while running the Dhrystone 2.1 benchmark and achieving 2.3 Dhrystone MIPs/MHz. This parameter is not 100%
tested but periodically sampled.
3. Maximum power consumption is the average measured at nominal VDD and maximum operating junction temperature (see
Table 4) while running an entirely cache-resident, contrived sequence of instructions to keep all the execution units
maximally busy.
4. Doze mode is not a user-definable state; it is an intermediate state between full-power and either nap or sleep mode. As a
result, power consumption for this mode is not tested.
5. Typical thermal power consumption is an average value measured at the nominal recommended VDD (see Table 4) and
105
°C while running the Dhrystone 2.1 benchmark and achieving 2.3 Dhrystone MIPs/MHz. This parameter is not 100%
tested but periodically sampled.
6. Typical power consumption for these modes is measured at the nominal recommended VDD (see Table 4) and 105°C in the
mode described. This parameter is not 100% tested but is periodically sampled.
7. Power consumption for the 1267 MHz device is intentionally constrained via testing and sorting to assure low power
consumption for this device.


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