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ISL12021IVZ Scheda tecnica(PDF) 7 Page - Intersil Corporation |
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ISL12021IVZ Scheda tecnica(HTML) 7 Page - Intersil Corporation |
7 / 24 page 7 FN6451.0 March 30, 2007 Serial Data (SDA) SDA is a bi-directional pin used to transfer data into and out of the device. It has an open drain output and may be ORed with other open drain or open collector outputs. The input buffer is always active (not gated) in normal mode. An open drain output requires the use of a pull-up resistor. The output circuitry controls the fall time of the output signal with the use of a slope controlled pull-down. The circuit is designed for 400kHz I2C interface speeds. It is disabled when the backup power supply on the VBAT pin is activated. VDD, GND Chip power supply and ground pins. The device will operate with a power supply from VDD = 2.7V to 5.5VDC. A 0.1µF capacitor is recommended on the VDD pin to ground. LVRSET (Low Voltage Reset) Brown Out Reset Mode. The pin provides an interrupt signal output. This signal notifies a host processor that the VDD level has dropped below pre-programmed level, normally 85% of nominal VDD. The brownout trip level is programmable via a control register. It is an open drain active low output. Functional Description Power Control Operation The power control circuit accepts a VDD and a VBAT input. Many types of batteries can be used with Intersil RTC products. For example, 3.0V or 3.6V Lithium batteries are appropriate, and battery sizes are available that can power the ISL1202x for up to 10 years. Another option is to use a Super Capacitor for applications where VDD is interrupted for up to a month. See the “Application Section” on page 21 for more information. Normal Mode (VDD) to Battery Backup Mode (VBAT) To transition from the VDD to VBAT mode, both of the following conditions must be met: Condition 1: VDD < VBAT - VBATHYS where VBATHYS ≈ 50mV Condition 2: VDD < VTRIP where VTRIP ≈ 2.2V Battery Backup Mode (VBAT) to Normal Mode (VDD) The ISL12021 device will switch from the VBAT to VDD mode when one of the following conditions occurs: Condition 1: VDD > VBAT + VBATHYS where VBATHYS ≈ 50mV Condition 2: VDD > VTRIP + VTRIPHYS where VTRIPHYS ≈ 30mV These power control situations are illustrated in Figure 3 and Figure 4. The I2C bus is deactivated in battery backup mode to reduce power consumption. Aside from this, all RTC functions are operational during battery backup mode. Except for SCL and SDA, all the inputs and outputs of the ISL12021 are active during battery backup mode unless disabled via the control register. The device Time Stamps the switchover from VDD to VBAT and VBAT to VDD, and the time is stored in TSV2B and TSB2V registers respectively. If multiple VDD power down sequences occur before status is read, the earliest VDD to VBAT power down time is stored and the most recent VBAT to VDD time is stored. Temperature conversion and compensation can be enabled in battery backup mode. Bit BTSE in the BETA register controls this operation as described in that register section. Power Failure Detection The ISL12021 provides a Real Time Clock Failure Bit (RTCF) to detect total power failure. It allows users to determine if the device has powered up after having lost all power to the device (both VDD and VBAT). VBAT - VBATHYS VBAT VBAT + VBATHYS BATTERY BACKUP MODE VDD VTRIP 2.2V 1.8V FIGURE 3. BATTERY SWITCHOVER WHEN VBAT < VTRIP FIGURE 4. BATTERY SWITCHOVER WHEN VBAT > VTRIP VTRIP VBAT VTRIP + VTRIPHYS BATTERY BACKUP MODE VDD VTRIP 3.0V 2.2V ISL12021 |
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