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ISL22346UFV20Z Scheda tecnica(PDF) 9 Page - Intersil Corporation

Il numero della parte ISL22346UFV20Z
Spiegazioni elettronici  Quad Digitally Controlled Potentiometers
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Produttore elettronici  INTERSIL [Intersil Corporation]
Homepage  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL22346UFV20Z Scheda tecnica(HTML) 9 Page - Intersil Corporation

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9
FN6177.0
July 28, 2006
Pin Descriptions
Potentiometers Pins
RHi and RLi (i = 0, 1, 2 or 3)
The high (RHi) and low (RLi) terminals of the ISL22346 are
equivalent to the fixed terminals of a mechanical
potentiometer. RHi and RLi are referenced to the relative
position of the wiper and not the voltage potential on the
terminals. With WRi set to 127 decimal, the wiper will be
closest to RHi, and with the WRi set to 0, the wiper is closest
to RLi.
RWi (i = 0, 1, 2 or 3)
RWi is the wiper terminal and is equivalent to the movable
terminal of a mechanical potentiometer. The position of the
wiper within the array is determined by the WRi register.
SHDN
The SHDN pin forces the resistor to end-to-end open circuit
condition on RHi and shorts RWi to RLi. When SHDN is
returned to logic high, the previous latch settings put RWi at
the same resistance setting prior to shutdown. This pin is
logically OR’d with SHDN bit in ACR register. I2C interface is
still available in shutdown mode and all registers are
accessible. This pin must remain HIGH for normal operation.
Bus Interface Pins
Serial Data Input/Output (SDA)
The SDA is a bidirectional serial data input/output pin for I2C
interface. It receives device address, operation code, wiper
address and data from an I2C external master device at the
rising edge of the serial clock SCL, and it shifts out data after
each falling edge of the serial clock.
SDA requires an external pull-up resistor, since it is an open
drain input/output.
Serial Clock (SCL)
This is the serial clock input of the I2C serial interface. SCL
requires an external pull-up resistor, since it is an open drain
input.
Device Address (A2 - A0)
The address inputs are used to set the least significant 3 bits
of the 7-bit I2C interface slave address. A match in the slave
address serial data stream must match with the Address
input pins in order to initiate communication with the
ISL22346. A maximum of 8 ISL22346 devices may occupy
the I2C serial bus.
Principles of Operation
The ISL22346 is an integrated circuit incorporating four
DCPs with their associated registers, non-volatile memory
and an I2C serial interface providing direct communication
between a host and the potentiometers and memory. The
resistor arrays are comprised of individual resistors
connected in series. At either end of the array and between
each resistor is an electronic switch that transfers the
potential at that point to the wiper.
The electronic switches on the device operate in a “make
before break” mode when the wiper changes tap positions.
FIGURE 13. MIDSCALE GLITCH, CODE 3Fh TO 40h
FIGURE 14. LARGE SIGNAL SETTLING TIME
Typical Performance Curves (Continued)
Wiper Mid Point Movement
from 3Fh to 40h
RL
RW
RH
FIGURE 15. DCP CONNECTION IN SHUTDOWN MODE
ISL22346


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