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74LCXZ2245SJ Scheda tecnica(PDF) 2 Page - Fairchild Semiconductor |
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74LCXZ2245SJ Scheda tecnica(HTML) 2 Page - Fairchild Semiconductor |
2 / 11 page www.fairchildsemi.com 2 Truth Table H HIGH Voltage Level L LOW Voltage Level X Immaterial Z High Impedance Note 2: Unused bus terminals during HIGH Z State must be held HIGH or LOW. Logic Diagram Inputs Outputs OE T/R L L Bus B0 – B7 Data to Bus A0 – A7 L H Bus A0 – A7 Data to Bus B0 – B7 H X HIGH Z State on A0 – A7, B0 – B7 (Note 2) |
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