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CA3306CD Scheda tecnica(PDF) 10 Page - Intersil Corporation |
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CA3306CD Scheda tecnica(HTML) 10 Page - Intersil Corporation |
10 / 17 page 10 TABLE 1. CHIP ENABLE TRUTH TABLE CE1 CE2 B1 - B6 OF 0 1 Valid Valid 1 1 Three-State Valid X 0 Three-State Three-State X = Don’t care TABLE 2. OUTPUT CODE TABLE CODE DESCRIPTION (NOTE 1) INPUT VOLTAGE BINARY OUTPUT CODE (LSB) DECIMAL COUNT VREF 6.40 (V) VREF 5.12 (V) VREF 4.80 (V) VREF 3.20 (V) OF B6B5B4B3B2B1 Zero 1 LSB 2 LSB 0.00 0.10 0.20 0.00 0.08 0.16 0.00 0.075 0.15 0.00 0.05 0.10 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 1 2 • • • • • • • • • • • • • • • • 1/ 2 Full Scale - 1 LSB 1/ 2 Full Scale 1/ 2 Full Scale + 1 LSB 3.10 3.20 3.30 2.48 2.56 2.64 2.325 2.40 2.475 1.55 1.60 1.65 0 0 0 0 1 1 1 0 0 1 0 0 1 0 0 1 0 0 1 0 1 31 32 33 • • • • • • • • • • • • • • • • Full Scale - 1 LSB Full Scale Overflow 6.20 6.30 6.40 4.96 5.04 5.12 4.65 4.725 4.80 3.10 3.15 3.20 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 1 62 63 127 NOTE: 1. The voltages listed above are the ideal centers of each output code shown as a function of its associated reference voltage. CA3306, CA3306A, CA3306C |
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