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DAC-08EP Scheda tecnica(PDF) 7 Page - National Semiconductor (TI) |
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DAC-08EP Scheda tecnica(HTML) 7 Page - National Semiconductor (TI) |
7 / 14 page Typical Applications 00568605 IO +IO =IFS for all logic states For fixed reference, TTL operation, typical values are: VREF = 10.000V RREF = 5.000k R15 ≈ RREF CC = 0.01 µF VLC = 0V (Ground) FIGURE 3. Basic Positive Reference Operation (Note 4) 00568621 FIGURE 4. Recommended Full Scale Adjustment Circuit (Note 4) 00568616 Note. RREF sets IFS; R15 is for bias current cancellation FIGURE 5. Basic Negative Reference Operation (Note 4) www.national.com 7 |
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