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SN74V225 Scheda tecnica(PDF) 9 Page - Texas Instruments

Il numero della parte SN74V225
Spiegazioni elettronici  512 X 18, 1024 X 18, 2048 X 18, 4096 X 18 DSP-SYNC FIRST-IN, FIRST-OUT MEMORIES
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SN74V225 Scheda tecnica(HTML) 9 Page - Texas Instruments

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SN74V215, SN74V225, SN74V235, SN74V245
512
× 18, 1024 × 18, 2048 × 18, 4096 × 18
DSP-SYNC
 FIRST-IN, FIRST-OUT MEMORIES
SCAS636E – APRIL 2000 – REVISED SEPTEMBER 2002
9
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
detailed description (continued)
DATA OUTPUTS (Q0–Q17)
Q0–Q17 are data outputs for 18-bit-wide data.
functional description
TIMING MODES:
STANDARD vs FIRST-WORD FALL-THROUGH (FWFT) MODE
The SN74V215, SN74V225, SN74V235, and SN74V245 support two different timing modes. The selection of
the mode of operation is determined during configuration at reset (RS). During an RS operation, the first load
(FL), read expansion input ( RXI), and write-expansion input (WXI) pins are used to select the timing mode as
shown in the truth table (see Table 5). In standard mode, the first word written to an empty FIFO does not appear
on the data output lines unless a specific read operation is performed. A read operation, which consists of
activating read enable (REN) and enabling a rising read clock (RCLK) edge, shifts the word from internal
memory to the data output lines. In FWFT mode, the first word written to an empty FIFO is clocked directly to
the data output lines after three transitions of the RCLK signal. A REN does not have to be asserted to access
the first word.
Various signals, both input and output signals, operate differently, depending on which timing mode is in effect.
FIRST-WORD FALL-THROUGH MODE (FWFT)
In this mode, status flags IR, PAF, HF, PAE, and OR operate in the manner outlined in Table 3. To write data
into the FIFO, WEN must be low. Data presented to the data-in lines is clocked into the FIFO on subsequent
transitions of WCLK. After the first write is performed, the output ready (OR) flag goes low. Subsequent writes
continue to fill the FIFO. PAE goes high after n + 2 words have been loaded into the FIFO, where n is the empty
offset value. The default setting for this value is stated in the footnote of Table 3. This parameter also is user
programmable. See the Programmable Flag Offset Loading section.
If data continues to be written into the FIFO, and no read operations are taking place, HF switches to low when
the 258th (SN74V215), 514th (SN74V225), 1026th (SN74V235), and 2050th (SN74V245) word, respectively,
is written into the FIFO. Continuing to write data into the FIFO causes PAF to go low. Again, if no reads are
performed, PAF goes low after (513 – m) writes for the SN74V215, (1025 – m) writes for the SN74V225,
(2049 – m) writes for the SN74V235, and (4097 – m) writes for the SN74V245, where m is the full offset value.
The default setting for this value is stated in the footnote of Table 3.
When the FIFO is full, the input ready (IR) flag goes high, inhibiting further write operations. If no reads are
performed after a reset, IR goes high after D writes to the FIFO. D = 513 for the SN74V215, 1025 for the
SN74V225, 2049 for the SN74V235, and 4097 for the SN74V245. The additional word in FWFT mode is due
to the capacity of the memory plus output register.
If the FIFO is full, the first read operation causes the IR flag to go low. Subsequent read operations cause PAF
and HF to go high at the conditions described in Table 3. If further read operations occur without write
operations, PAE goes low when there are n + 1 words in the FIFO, where n is the empty offset value. If there
is no empty offset specified, PAE is low when the device is 64 away from empty for SN74V215, and 128 away
from empty for SN74V225, SN74V235, and SN74V245. Continuing read operations cause the FIFO to be
empty. When the last word has been read from the FIFO, OR goes high, inhibiting further read operations. REN
is ignored when the FIFO is empty.


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