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AT90S2313 Scheda tecnica(PDF) 42 Page - ATMEL Corporation |
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AT90S2313 Scheda tecnica(HTML) 42 Page - ATMEL Corporation |
42 / 92 page 42 AT90S2313 0839I–AVR–06/02 UART The AT90S2313 features a full duplex (separate Receive and Transmit Registers) Uni- versal Asynchronous Receiver and Transmitter (UART). The main features are: • Baud Rate Generator that can Generate a Large Number of Baud Rates (bps) • High Baud Rates at Low XTAL Frequencies • 8 or 9 Bits Data • Noise Filtering • Overrun Detection • Framing Error Detection • False Start Bit Detection • Three separate Interrupts on TX Complete, TX Data Register Empty and RX Complete Data Transmission A block schematic of the UART transmitter is shown in Figure 34. Data transmission is initiated by writing the data to be transmitted to the UART I/O Data Register (UDR). Data is transferred from UDR to the Transmit Shift Register when: • A new character has been written to UDR after the stop bit from the previous character has been shifted out. The Shift Register is loaded immediately. • A new character has been written to UDR before the stop bit from the previous character has been shifted out. The Shift Register is loaded when the stop bit of the character currently being transmitted has been shifted out. Figure 34. UART Transmitter If the 10(11)-bit Transmitter Shift Register is empty, data is transferred from UDR to the Shift Register. At this time the UDRE (UART Data Register Empty) bit in the UART Sta- |
Codice articolo simile - AT90S2313_02 |
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Descrizione simile - AT90S2313_02 |
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