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MC14511BDW Scheda tecnica(PDF) 5 Page - ON Semiconductor |
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MC14511BDW Scheda tecnica(HTML) 5 Page - ON Semiconductor |
5 / 10 page MC14511B http://onsemi.com 5 Figure 1. Dynamic Power Dissipation Signal Waveforms Input LE low, and Inputs D, BI and LT high. f in respect to a system clock. All outputs connected to respective CL loads. 20 ns 20 ns VDD VSS VOH VOL 90% 50% 10% 50% A, B, AND C ANY OUTPUT 50% DUTY CYCLE 1 2f Figure 2. Dynamic Signal Waveforms 20 ns 20 ns VDD 90% INPUT C (a) Inputs D and LE low, and Inputs A, B, BI and LT high. VSS VOH VOL 50% 10% OUTPUT g tPLH tPHL 90% 10% 50% tTLH tTHL (b) Input D low, Inputs A, B, BI and LT high. 20 ns 10% 90% 50% VDD VSS VDD VSS VOH VOL th tsu 50% INPUT C OUTPUT g LE (c) Data DCBA strobed into latches. 20 ns 20 ns VDD VSS LE 90% 50% 10% tWL |
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