© Semiconductor Components Industries, LLC, 2006

December, 2006 − Rev. 11

1

Publication Order Number:

MC100EPT22/D

MC100EPT22

3.3VDual LVTTL/LVCMOS

to Differential LVPECL

Translator

Description

The MC100EPT22 is a dual LVTTL/LVCMOS to differential

LVPECL translator. Because LVPECL (Positive ECL) levels are used

only +3.3 V and ground are required. The small outline 8−lead

package and the single gate of the EPT22 makes it ideal for those

applications where space, performance, and low power are at a

premium. Because the mature MOSAIC 5 process is used, low cost

and high speed can be added to the list of features.

Features

A

= Assembly Location

L

= Wafer Lot

Y

= Year

W

= Work Week

M

= Date Code

G

= Pb−Free Package

SOIC−8

D SUFFIX

CASE 751

MARKING

DIAGRAMS*

TSSOP−8

DT SUFFIX

CASE 948R

ALYWG

G

KA22

1

8

1

8

http://onsemi.com

*For additional marking information, refer to

Application Note AND8002/D.

See detailed ordering and shipping information in the package

dimensions section on page 5 of this data sheet.

ORDERING INFORMATION

1

8

KPT22

ALYW

G

1

8

DFN8

MN SUFFIX

CASE 506AA

14

(Note: Microdot may be in either location)