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MC100EP40DTR2 Scheda tecnica(PDF) 2 Page - ON Semiconductor |
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MC100EP40DTR2 Scheda tecnica(HTML) 2 Page - ON Semiconductor |
2 / 9 page MC100EP40 http://onsemi.com 2 Figure 1. 20−Lead Pinout (Top View) 19 20 18 17 16 15 14 2 1 34567 13 8 12 9 11 10 DD UU VCC NC VEE VTFB FB FB VBB VTR Figure 2. Logic Diagram U, U ECL Up Differential Outputs D, D ECL Down Differential Outputs FB, FB ECL Feedback Differential Inputs R, R ECL Reference Differential Inputs PLD ECL Phase Lock Detect Function VTR ECL Internal Termination for R VTR ECL Internal Termination for R VTFB ECL Internal Termination for FB VTFB ECL Internal Termination for FB VBB Reference Voltage Output VCC Positive Supply VEE Negative Supply NC No Connect Table 1. PIN DESCRIPTION Warning: All VCC and VEE pins must be externally connected to Power Supply to guarantee proper operation. R U R U U A (V) FB D B B A Reset Reset C D A C D B Reset Reset C A B D D D VBB S R FF VCC PLD VCC VEE VTFB RR VTR U R S FF D 50 W 50 W 50 W 50 W VTR VTR VTFB FB VTFB PIN FUNCTION |
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