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MC10EP139DWR2 Scheda tecnica(PDF) 11 Page - ON Semiconductor |
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MC10EP139DWR2 Scheda tecnica(HTML) 11 Page - ON Semiconductor |
11 / 14 page MC10EP139, MC100EP139 http://onsemi.com 11 ORDERING INFORMATION Device Package Shipping† MC10EP139DT TSSOP−20* 75 Units / Rail MC10EP139DTG TSSOP−20* 75 Units / Rail MC10EP139DTR2 TSSOP−20* 2500 / Tape & Reel MC10EP139DTR2G TSSOP−20* 2500 / Tape & Reel MC10EP139DW SOIC−20 38 Units / Rail MC10EP139DWG SOIC−20 (Pb−Free 38 Units / Rail MC10EP139DWR2 SOIC−20 1000 / Tape & Reel MC10EP139DWR2G SOIC−20 (Pb−Free 1000 / Tape & Reel MC10EP139MNG QFN−20 (Pb−Free) 92 Units / Rail MC10EP139MNTXG QFN−20 (Pb−Free) 3000 / Tape & Reel MC100EP139DT TSSOP−20* 75 Units / Rail MC100EP139DTG TSSOP−20* 75 Units / Rail MC100EP139DTR2 TSSOP−20* 2500 / Tape & Reel MC100EP139DTR2G TSSOP−20* 2500 / Tape & Reel MC100EP139DW SOIC−20 38 Units / Rail MC100EP139DWG SOIC−20 (Pb−Free 38 Units / Rail MC100EP139DWR2 SOIC−20 1000 / Tape & Reel MC100EP139DWR2G SOIC−20 (Pb−Free 1000 / Tape & Reel MC100EP139MNG QFN−20 (Pb−Free) 92 Units / Rail MC100EP139MNTXG QFN−20 (Pb−Free) 3000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb−Free. Resource Reference of Application Notes AN1405/D − ECL Clock Distribution Techniques AN1406/D − Designing with PECL (ECL at +5.0 V) AN1503/D − ECLinPSt I/O SPiCE Modeling Kit AN1504/D − Metastability and the ECLinPS Family AN1568/D − Interfacing Between LVDS and ECL AN1672/D − The ECL Translator Guide AND8001/D − Odd Number Counters Design AND8002/D − Marking and Date Codes AND8020/D − Termination of ECL Logic Devices AND8066/D − Interfacing with ECLinPS AND8090/D − AC Characteristics of ECL Devices |
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